Struct nucleo_f401re::dma2::hisr::R

pub struct R { /* private fields */ }

Value read from the register

Implementations

impl R

pub fn bits(&self) -> u32

Value of the register as raw bits

pub fn tcif7(&self) -> TCIF7R

Bit 27 - Stream x transfer complete interrupt flag (x=7..4)

pub fn htif7(&self) -> HTIF7R

Bit 26 - Stream x half transfer interrupt flag (x=7..4)

pub fn teif7(&self) -> TEIF7R

Bit 25 - Stream x transfer error interrupt flag (x=7..4)

pub fn dmeif7(&self) -> DMEIF7R

Bit 24 - Stream x direct mode error interrupt flag (x=7..4)

pub fn feif7(&self) -> FEIF7R

Bit 22 - Stream x FIFO error interrupt flag (x=7..4)

pub fn tcif6(&self) -> TCIF7R

Bit 21 - Stream x transfer complete interrupt flag (x=7..4)

pub fn htif6(&self) -> HTIF7R

Bit 20 - Stream x half transfer interrupt flag (x=7..4)

pub fn teif6(&self) -> TEIF7R

Bit 19 - Stream x transfer error interrupt flag (x=7..4)

pub fn dmeif6(&self) -> DMEIF7R

Bit 18 - Stream x direct mode error interrupt flag (x=7..4)

pub fn feif6(&self) -> FEIF7R

Bit 16 - Stream x FIFO error interrupt flag (x=7..4)

pub fn tcif5(&self) -> TCIF7R

Bit 11 - Stream x transfer complete interrupt flag (x=7..4)

pub fn htif5(&self) -> HTIF7R

Bit 10 - Stream x half transfer interrupt flag (x=7..4)

pub fn teif5(&self) -> TEIF7R

Bit 9 - Stream x transfer error interrupt flag (x=7..4)

pub fn dmeif5(&self) -> DMEIF7R

Bit 8 - Stream x direct mode error interrupt flag (x=7..4)

pub fn feif5(&self) -> FEIF7R

Bit 6 - Stream x FIFO error interrupt flag (x=7..4)

pub fn tcif4(&self) -> TCIF7R

Bit 5 - Stream x transfer complete interrupt flag (x=7..4)

pub fn htif4(&self) -> HTIF7R

Bit 4 - Stream x half transfer interrupt flag (x=7..4)

pub fn teif4(&self) -> TEIF7R

Bit 3 - Stream x transfer error interrupt flag (x=7..4)

pub fn dmeif4(&self) -> DMEIF7R

Bit 2 - Stream x direct mode error interrupt flag (x=7..4)

pub fn feif4(&self) -> FEIF7R

Bit 0 - Stream x FIFO error interrupt flag (x=7..4)