Struct nucleo_f042k6::rcc::cfgr::R

pub struct R { /* fields omitted */ }

Value read from the register

Methods

impl R

pub fn bits(&self) -> u32

Value of the register as raw bits

pub fn sw(&self) -> SWR

Bits 0:1 - System clock Switch

pub fn sws(&self) -> SWSR

Bits 2:3 - System Clock Switch Status

pub fn hpre(&self) -> HPRER

Bits 4:7 - AHB prescaler

pub fn ppre(&self) -> PPRER

Bits 8:10 - APB Low speed prescaler (APB1)

pub fn adcpre(&self) -> ADCPRER

Bit 14 - APCPRE is deprecated. See ADC field in CFGR2 register.

pub fn pllsrc(&self) -> PLLSRCR

Bits 15:16 - PLL input clock source

pub fn pllxtpre(&self) -> PLLXTPRER

Bit 17 - HSE divider for PLL entry. Same bit as PREDIC[0] from CFGR2 register. Refer to it for its meaning

pub fn pllmul(&self) -> PLLMULR

Bits 18:21 - PLL Multiplication Factor

pub fn mco(&self) -> MCOR

Bits 24:26 - Microcontroller clock output

pub fn mcopre(&self) -> MCOPRER

Bits 28:30 - Microcontroller Clock Output Prescaler

pub fn pllnodiv(&self) -> PLLNODIVR

Bit 31 - PLL clock not divided for MCO