pub struct R(/* private fields */);
Expand description
Register INTENSET
reader
Implementations§
source§impl R
impl R
sourcepub fn triggered0(&self) -> BitReaderRaw<TRIGGERED0_A>
pub fn triggered0(&self) -> BitReaderRaw<TRIGGERED0_A>
Bit 0 - Write ‘1’ to enable interrupt for TRIGGERED[0] event
sourcepub fn triggered1(&self) -> BitReaderRaw<TRIGGERED1_A>
pub fn triggered1(&self) -> BitReaderRaw<TRIGGERED1_A>
Bit 1 - Write ‘1’ to enable interrupt for TRIGGERED[1] event
sourcepub fn triggered2(&self) -> BitReaderRaw<TRIGGERED2_A>
pub fn triggered2(&self) -> BitReaderRaw<TRIGGERED2_A>
Bit 2 - Write ‘1’ to enable interrupt for TRIGGERED[2] event
sourcepub fn triggered3(&self) -> BitReaderRaw<TRIGGERED3_A>
pub fn triggered3(&self) -> BitReaderRaw<TRIGGERED3_A>
Bit 3 - Write ‘1’ to enable interrupt for TRIGGERED[3] event
sourcepub fn triggered4(&self) -> BitReaderRaw<TRIGGERED4_A>
pub fn triggered4(&self) -> BitReaderRaw<TRIGGERED4_A>
Bit 4 - Write ‘1’ to enable interrupt for TRIGGERED[4] event
sourcepub fn triggered5(&self) -> BitReaderRaw<TRIGGERED5_A>
pub fn triggered5(&self) -> BitReaderRaw<TRIGGERED5_A>
Bit 5 - Write ‘1’ to enable interrupt for TRIGGERED[5] event
sourcepub fn triggered6(&self) -> BitReaderRaw<TRIGGERED6_A>
pub fn triggered6(&self) -> BitReaderRaw<TRIGGERED6_A>
Bit 6 - Write ‘1’ to enable interrupt for TRIGGERED[6] event
sourcepub fn triggered7(&self) -> BitReaderRaw<TRIGGERED7_A>
pub fn triggered7(&self) -> BitReaderRaw<TRIGGERED7_A>
Bit 7 - Write ‘1’ to enable interrupt for TRIGGERED[7] event
sourcepub fn triggered8(&self) -> BitReaderRaw<TRIGGERED8_A>
pub fn triggered8(&self) -> BitReaderRaw<TRIGGERED8_A>
Bit 8 - Write ‘1’ to enable interrupt for TRIGGERED[8] event
sourcepub fn triggered9(&self) -> BitReaderRaw<TRIGGERED9_A>
pub fn triggered9(&self) -> BitReaderRaw<TRIGGERED9_A>
Bit 9 - Write ‘1’ to enable interrupt for TRIGGERED[9] event
sourcepub fn triggered10(&self) -> BitReaderRaw<TRIGGERED10_A>
pub fn triggered10(&self) -> BitReaderRaw<TRIGGERED10_A>
Bit 10 - Write ‘1’ to enable interrupt for TRIGGERED[10] event
sourcepub fn triggered11(&self) -> BitReaderRaw<TRIGGERED11_A>
pub fn triggered11(&self) -> BitReaderRaw<TRIGGERED11_A>
Bit 11 - Write ‘1’ to enable interrupt for TRIGGERED[11] event
sourcepub fn triggered12(&self) -> BitReaderRaw<TRIGGERED12_A>
pub fn triggered12(&self) -> BitReaderRaw<TRIGGERED12_A>
Bit 12 - Write ‘1’ to enable interrupt for TRIGGERED[12] event
sourcepub fn triggered13(&self) -> BitReaderRaw<TRIGGERED13_A>
pub fn triggered13(&self) -> BitReaderRaw<TRIGGERED13_A>
Bit 13 - Write ‘1’ to enable interrupt for TRIGGERED[13] event
sourcepub fn triggered14(&self) -> BitReaderRaw<TRIGGERED14_A>
pub fn triggered14(&self) -> BitReaderRaw<TRIGGERED14_A>
Bit 14 - Write ‘1’ to enable interrupt for TRIGGERED[14] event
sourcepub fn triggered15(&self) -> BitReaderRaw<TRIGGERED15_A>
pub fn triggered15(&self) -> BitReaderRaw<TRIGGERED15_A>
Bit 15 - Write ‘1’ to enable interrupt for TRIGGERED[15] event
Methods from Deref<Target = R<INTENSET_SPEC>>§
sourcepub fn bits(&self) -> <REG as RegisterSpec>::Ux
pub fn bits(&self) -> <REG as RegisterSpec>::Ux
Reads raw bits from register.