Module nrf52840_hal::pac::spim0 [−][src]
Expand description
Serial Peripheral Interface Master with EasyDMA 0
Modules
Configuration register
Polarity of CSN output
DCX configuration
Enable SPIM
End of RXD buffer and TXD buffer reached
End of RXD buffer reached
End of TXD buffer reached
Transaction started
SPI transaction has stopped
SPI frequency. Accuracy depends on the HFCLK source selected.
Register block Unspecified
Disable interrupt
Enable interrupt
Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT
Register block Unspecified
Pin select for DCX signal
Register block RXD EasyDMA channel
Shortcut register
Stall status for EasyDMA RAM accesses. The fields in this register is set to STALL by hardware whenever a stall occurres and can be cleared (set to NOSTALL) by the CPU.
Resume SPI transaction
Start SPI transaction
Stop SPI transaction
Suspend SPI transaction
Register block TXD EasyDMA channel
Structs
Register block
Register block
Register block
Register block
Register block
Type Definitions
Configuration register
Polarity of CSN output
DCX configuration
Enable SPIM
End of RXD buffer and TXD buffer reached
End of RXD buffer reached
End of TXD buffer reached
Transaction started
SPI transaction has stopped
SPI frequency. Accuracy depends on the HFCLK source selected.
Disable interrupt
Enable interrupt
Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT
Pin select for DCX signal
Shortcut register
Stall status for EasyDMA RAM accesses. The fields in this register is set to STALL by hardware whenever a stall occurres and can be cleared (set to NOSTALL) by the CPU.
Resume SPI transaction
Start SPI transaction
Stop SPI transaction
Suspend SPI transaction