Trait nalgebra::SimdBool[−][src]

pub trait SimdBool: Copy + BitAnd<Self, Output = Self> + BitOr<Self, Output = Self> + BitXor<Self, Output = Self> + Not<Output = Self> {
    pub fn bitmask(self) -> u64;

    pub fn and(self) -> bool;

    pub fn or(self) -> bool;

    pub fn xor(self) -> bool;

    pub fn all(self) -> bool;

    pub fn any(self) -> bool;

    pub fn none(self) -> bool;

    pub fn if_else<Res>(
        self, 
        if_value: impl FnOnce() -> Res, 
        else_value: impl FnOnce() -> Res
    ) -> Res
    where
        Res: SimdValue<SimdBool = Self>;

    pub fn if_else2<Res>(
        self, 
        if_value: impl FnOnce() -> Res, 
        else_if: (impl FnOnce() -> Self, impl FnOnce() -> Res), 
        else_value: impl FnOnce() -> Res
    ) -> Res
    where
        Res: SimdValue<SimdBool = Self>;

    pub fn if_else3<Res>(
        self, 
        if_value: impl FnOnce() -> Res, 
        else_if: (impl FnOnce() -> Self, impl FnOnce() -> Res), 
        else_else_if: (impl FnOnce() -> Self, impl FnOnce() -> Res), 
        else_value: impl FnOnce() -> Res
    ) -> Res
    where
        Res: SimdValue<SimdBool = Self>;
}

Lane-wise generalization of bool for SIMD booleans.

This trait implemented by bool as well as SIMD boolean types like packed_simd::m32x4. It is designed to abstract the behavior of booleans so it can work with multi-lane boolean values in an AoSoA setting.

Required methods

pub fn bitmask(self) -> u64[src]

A bit mask representing the boolean state of each lanes of self.

The i-th bit of the result is 1 iff. the i-th lane of self is true.

pub fn and(self) -> bool[src]

Lane-wise bitwise and of the vector elements.

pub fn or(self) -> bool[src]

Lane-wise bitwise or of the vector elements.

pub fn xor(self) -> bool[src]

Lane-wise bitwise xor of the vector elements.

pub fn all(self) -> bool[src]

Are all vector lanes true?

pub fn any(self) -> bool[src]

Is any vector lane true?

pub fn none(self) -> bool[src]

Are all vector lanes false?

pub fn if_else<Res>(
    self,
    if_value: impl FnOnce() -> Res,
    else_value: impl FnOnce() -> Res
) -> Res where
    Res: SimdValue<SimdBool = Self>, [src]

Merges the value of if_value() and else_value() depending on the lanes of self.

  • For each lane of self containing 1, the result will contain the corresponding lane of if_value().
  • For each lane of self containing 0, the result will contain the corresponding lane of else_value().

The implementor of this trait is free to choose on what cases if_value and else_value are actually called.

pub fn if_else2<Res>(
    self,
    if_value: impl FnOnce() -> Res,
    else_if: (impl FnOnce() -> Self, impl FnOnce() -> Res),
    else_value: impl FnOnce() -> Res
) -> Res where
    Res: SimdValue<SimdBool = Self>, [src]

Merges the value of if_value() and else_if.1() and else_value() depending on the lanes of self and else_if.0().

  • For each lane of self containing 1, the result will contain the corresponding lane of if_value().
  • For each lane of self containing 0 but with a corresponding lane of else_if.0() containing 1, the result will contain the corresponding lane of else_if.1().
  • For each lane of self containing 0 but with a corresponding lane of else_if.0() containing 0, the result will contain the corresponding lane of else_value().

The implementor of this trait is free to choose on what cases any of those closures are implemented.

pub fn if_else3<Res>(
    self,
    if_value: impl FnOnce() -> Res,
    else_if: (impl FnOnce() -> Self, impl FnOnce() -> Res),
    else_else_if: (impl FnOnce() -> Self, impl FnOnce() -> Res),
    else_value: impl FnOnce() -> Res
) -> Res where
    Res: SimdValue<SimdBool = Self>, [src]

Merges the value of if_value() and else_if.1() and else_else_if.1() and else_value() depending on the lanes of self and else_if.0() and else_else_if.0().

  • For each lane of self containing 1, the result will contain the corresponding lane of if_value().
  • For each lane of self containing 0 but with a corresponding lane of else_if.0() containing 1, the result will contain the corresponding lane of else_if.1().
  • For each lane of self containing 0 and else_if.0() containing 0 and else_else_if.0() containing 1, the result will contain the corresponding lane of else_else_if.1().
  • Other lanes will contain the corresponding lane of else_value().

The implementor of this trait is free to choose on what cases any of those closures are implemented.

Loading content...

Implementations on Foreign Types

impl SimdBool for AutoSimd<[bool; 16]>[src]

impl SimdBool for bool[src]

impl SimdBool for AutoSimd<[bool; 4]>[src]

impl SimdBool for AutoSimd<[bool; 32]>[src]

impl SimdBool for AutoSimd<[bool; 8]>[src]

impl SimdBool for AutoSimd<[bool; 2]>[src]

impl SimdBool for AutoSimd<[bool; 1]>[src]

Loading content...

Implementors

Loading content...