Module msp430fr6972::timer_0_b7::tb0cctl2[][src]

Timer0_B7 Capture/Compare Control 2

Structs

CAP_R

Field CAP reader - Capture mode: 1 /Compare mode : 0

CAP_W

Field CAP writer - Capture mode: 1 /Compare mode : 0

CCIE_R

Field CCIE reader - Capture/compare interrupt enable

CCIE_W

Field CCIE writer - Capture/compare interrupt enable

CCIFG_R

Field CCIFG reader - Capture/compare interrupt flag

CCIFG_W

Field CCIFG writer - Capture/compare interrupt flag

CCIS_R

Field CCIS reader - Capture input select 1

CCIS_W

Field CCIS writer - Capture input select 1

CCI_R

Field CCI reader - Capture input signal (read)

CCI_W

Field CCI writer - Capture input signal (read)

CLLD_R

Field CLLD reader - Compare latch load source 1

CLLD_W

Field CLLD writer - Compare latch load source 1

CM_R

Field CM reader - Capture mode 1

CM_W

Field CM writer - Capture mode 1

COV_R

Field COV reader - Capture/compare overflow flag

COV_W

Field COV writer - Capture/compare overflow flag

OUTMOD_R

Field OUTMOD reader - Output mode 2

OUTMOD_W

Field OUTMOD writer - Output mode 2

OUT_R

Field OUT reader - PWM Output signal if output mode 0

OUT_W

Field OUT writer - PWM Output signal if output mode 0

R

Register TB0CCTL2 reader

SCS_R

Field SCS reader - Capture sychronize

SCS_W

Field SCS writer - Capture sychronize

TB0CCTL2_SPEC

Timer0_B7 Capture/Compare Control 2

W

Register TB0CCTL2 writer

Enums

CCIS_A

Capture input select 1

CLLD_A

Compare latch load source 1

CM_A

Capture mode 1

OUTMOD_A

Output mode 2