Module msp430fr6972::usci_b0_i2c_mode::ucb0ctlw1 [−][src]
USCI B0 Control Word Register 1
Structs
R | Register |
UCASTP_R | Field |
UCASTP_W | Field |
UCB0CTLW1_SPEC | USCI B0 Control Word Register 1 |
UCCLTO_R | Field |
UCCLTO_W | Field |
UCETXINT_R | Field |
UCETXINT_W | Field |
UCGLIT_R | Field |
UCGLIT_W | Field |
UCSTPNACK_R | Field |
UCSTPNACK_W | Field |
UCSWACK_R | Field |
UCSWACK_W | Field |
W | Register |
Enums
UCASTP_A | USCI Automatic Stop condition generation Bit: 1 |
UCCLTO_A | USCI Clock low timeout Bit: 1 |
UCGLIT_A | USCI Deglitch time Bit: 1 |