Module msp430fr2x5x_hal::clock

Clock system for configuration of MCLK, SMCLK, and ACLK.

Once configuration is complete, Aclk and Smclk clock objects are returned for configuring other peripherals. Configuration of MCLK and SMCLK must occur, though SMCLK can be disabled. In that case, only Aclk is returned.

DCO with FLL is supported on MCLK for select frequencies, as supporting other frequency values would require complex calibrations not handled by the HAL.

Structs

Aclk	ACLK clock object
ClockConfig	Builder object containing system clock configuration
Smclk	SMCLK clock object

Enums

DcoclkFreqSel	Selectable DCOCLK frequencies when using factory trim settings. Actual frequencies may be slightly higher.
MclkDiv	MCLK source divider
SmclkDiv	SMCLK source divider. SMCLK directly derives from MCLK. SMCLK frequency is the combination of DIVM and DIVS out of selected clock source.

Constants

REFOCLK	REFOCLK frequency
VLOCLK	VLOCLK frequency

Traits

Clock	Trait for configured clock objects
CsExt	Extension trait allowing the PAC CS struct to be converted into the HAL clock configuration builder object.