[][src]Module msp430fr2355::pmm::pm5ctl0

Power mode 5 control register 0

Structs

LOCKLPM5_W

Write proxy for field LOCKLPM5

LPM5SM_W

Write proxy for field LPM5SM

LPM5SW_W

Write proxy for field LPM5SW

Enums

LOCKLPM5_A

LPMx.5 Lock Bit

LPM5SM_A

Specifies the operation mode of the LPM3.5 switch.

LPM5SW_A

Reports or sets the LPM3.5 switch connection upon the switch mode set by LPM5SM. When this bit is set, the VLPM3.5 domain can accept full-speed read and write operation by CPU MCLK. If the switch is disconnected, all peripherals within this domain can only accept the operation no more than 40 kHz. In automatic mode (LPM5SM = 0), this bit represents the switch connection between Vcore and VLPM3.5. Any write to this bit has no effect. In manual mode (LPM5SM = 1), this bit can be fully read and written by software. When this bit is set, the switch connection between Vcore and VLPM3.5 is connected. Otherwise, the switch is disconnected.

Type Definitions

LOCKLPM5_R

Reader of field LOCKLPM5

LPM5SM_R

Reader of field LPM5SM

LPM5SW_R

Reader of field LPM5SW

R

Reader of register PM5CTL0

W

Writer for register PM5CTL0