Module msp430f5529::dma::dma0ctl

DMA Channel 0 Control

Structs

DMA0CTL_SPEC

DMA Channel 0 Control

DMAABORT_R

Field DMAABORT reader - DMA transfer aborted by NMI

DMAABORT_W

Field DMAABORT writer - DMA transfer aborted by NMI

DMADSTBYTE_R

Field DMADSTBYTE reader - DMA destination byte

DMADSTBYTE_W

Field DMADSTBYTE writer - DMA destination byte

DMADSTINCR_R

Field DMADSTINCR reader - DMA destination increment bit 0

DMADSTINCR_W

Field DMADSTINCR writer - DMA destination increment bit 0

DMADT_R

Field DMADT reader - DMA transfer mode bit 0

DMADT_W

Field DMADT writer - DMA transfer mode bit 0

DMAEN_R

Field DMAEN reader - DMA enable

DMAEN_W

Field DMAEN writer - DMA enable

DMAIE_R

Field DMAIE reader - DMA interrupt enable

DMAIE_W

Field DMAIE writer - DMA interrupt enable

DMAIFG_R

Field DMAIFG reader - DMA interrupt flag

DMAIFG_W

Field DMAIFG writer - DMA interrupt flag

DMALEVEL_R

Field DMALEVEL reader - DMA level sensitive trigger select

DMALEVEL_W

Field DMALEVEL writer - DMA level sensitive trigger select

DMAREQ_R

Field DMAREQ reader - Initiate DMA transfer with DMATSEL

DMAREQ_W

Field DMAREQ writer - Initiate DMA transfer with DMATSEL

DMASRCBYTE_R

Field DMASRCBYTE reader - DMA source byte

DMASRCBYTE_W

Field DMASRCBYTE writer - DMA source byte

DMASRCINCR_R

Field DMASRCINCR reader - DMA source increment bit 0

DMASRCINCR_W

Field DMASRCINCR writer - DMA source increment bit 0

R

Register DMA0CTL reader

W

Register DMA0CTL writer

Enums

DMADSTINCR_A

DMA destination increment bit 0

DMADT_A

DMA transfer mode bit 0

DMASRCINCR_A

DMA source increment bit 0