Module moore_vhdl::ty2

The VHDL type system.

This module implements the VHDL type system in a fairly isolated manner. The intention is to decouple the type logic as far as possible from details about other parts of the compiler.

See IEEE 1076-2008 section 5 for all the details.

Structs

AccessType	An access type.
ArrayType	An array type.
BigInt	A big signed integer type.
EnumBasetype	An enumeration base type.
FloatingBasetype	A real base type.
IntegerBasetype	An integer base type.
NullType	A null type.
PhysicalBasetype	A physical base type.
PhysicalUnit	A unit of a physical type.
Range	A directed range of values.
ScalarSubtype	A subtype of a scalar type.
SubtypeDecl	A subtype declaration.
TypeArena	An arena to allocate types nodes into.
TypeDecl	A type declaration.
TypeMark	A type mark.
UniversalIntegerType	A universal integer.
UniversalRealType	A universal real.

Enums

AnyType	A type.
EnumVariant	An enumeration variant.
OwnedType	An owned type.
RangeDir	A range direction.
TypeName	A type name.

Traits

EnumType	An enumeration type.
FloatingType	A real type.
IntegerType	An integer type.
PhysicalType	A physical type.
Subtype	An interface for dealing with subtypes.
Type	An interface for dealing with types.

Type Definitions

EnumSubtype	A subtype of an enumeration type.
FloatingSubtype	A subtype of an real type.
IntegerRange	A range of integer values.
IntegerSubtype	A subtype of an integer type.
PhysicalSubtype	A subtype of an integer type.
RealRange	A range of real values.