Module mkw41z::sim::clkdiv1 [−] [src]

System Clock Divider Register 1

Structs

R	Value read from the register
W	Value to write to the register
_OUTDIV1W	Proxy
_OUTDIV4W	Proxy

Enums

OUTDIV1R	Possible values of the field `OUTDIV1`
OUTDIV1W	Values that can be written to the field `OUTDIV1`
OUTDIV4R	Possible values of the field `OUTDIV4`
OUTDIV4W	Values that can be written to the field `OUTDIV4`

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