[−][src]Module mkl26z4::uart0
Universal Asynchronous Receiver/Transmitter
Modules
| bdh | UART Baud Rate Register High |
| bdl | UART Baud Rate Register Low |
| c1 | UART Control Register 1 |
| c2 | UART Control Register 2 |
| c3 | UART Control Register 3 |
| c4 | UART Control Register 4 |
| c5 | UART Control Register 5 |
| d | UART Data Register |
| ma1 | UART Match Address Registers 1 |
| ma2 | UART Match Address Registers 2 |
| s1 | UART Status Register 1 |
| s2 | UART Status Register 2 |
Structs
| RegisterBlock | Register block |
Type Definitions
| BDH | UART Baud Rate Register High |
| BDL | UART Baud Rate Register Low |
| C1 | UART Control Register 1 |
| C2 | UART Control Register 2 |
| C3 | UART Control Register 3 |
| C4 | UART Control Register 4 |
| C5 | UART Control Register 5 |
| D | UART Data Register |
| MA1 | UART Match Address Registers 1 |
| MA2 | UART Match Address Registers 2 |
| S1 | UART Status Register 1 |
| S2 | UART Status Register 2 |