[−][src]Module mk66f18::usbphy::pll_sic_tog

USB PHY PLL Control/Status Register

Structs

PLL_BYPASS_W	Write proxy for field `PLL_BYPASS`
PLL_DIV_SEL_W	Write proxy for field `PLL_DIV_SEL`
PLL_ENABLE_W	Write proxy for field `PLL_ENABLE`
PLL_EN_USB_CLKS_W	Write proxy for field `PLL_EN_USB_CLKS`
PLL_HOLD_RING_OFF_W	Write proxy for field `PLL_HOLD_RING_OFF`
PLL_POWER_W	Write proxy for field `PLL_POWER`

PLL_DIV_SEL_A	This field controls the USB PLL feedback loop divider
PLL_LOCK_A	USB PLL lock status indicator

PLL_BYPASS_R	Reader of field `PLL_BYPASS`
PLL_DIV_SEL_R	Reader of field `PLL_DIV_SEL`
PLL_ENABLE_R	Reader of field `PLL_ENABLE`
PLL_EN_USB_CLKS_R	Reader of field `PLL_EN_USB_CLKS`
PLL_HOLD_RING_OFF_R	Reader of field `PLL_HOLD_RING_OFF`
PLL_LOCK_R	Reader of field `PLL_LOCK`
PLL_POWER_R	Reader of field `PLL_POWER`
R	Reader of register PLL_SIC_TOG
W	Writer for register PLL_SIC_TOG