Module mk20d7::pdb0
[−]
[src]
Programmable Delay Block
Modules
| chc1 |
Channel n Control Register 1 |
| chdly0 |
Channel n Delay 0 Register |
| chdly1 |
Channel n Delay 1 Register |
| chs |
Channel n Status Register |
| cnt |
Counter Register |
| dacint |
DAC Interval n Register |
| dacintc |
DAC Interval Trigger n Control Register |
| idly |
Interrupt Delay Register |
| mod_ |
Modulus Register |
| podly |
Pulse-Out n Delay Register |
| poen |
Pulse-Out n Enable Register |
| sc |
Status and Control Register |
Structs
| CHC1 |
Channel n Control Register 1 |
| CHDLY0 |
Channel n Delay 0 Register |
| CHDLY1 |
Channel n Delay 1 Register |
| CHS |
Channel n Status Register |
| CNT |
Counter Register |
| DACINT |
DAC Interval n Register |
| DACINTC |
DAC Interval Trigger n Control Register |
| IDLY |
Interrupt Delay Register |
| MOD |
Modulus Register |
| PODLY |
Pulse-Out n Delay Register |
| POEN |
Pulse-Out n Enable Register |
| RegisterBlock |
Register block |
| SC |
Status and Control Register |