mimxrt685s_pac/sysctl0/
dsp_flexspi_access_disable.rs1#[doc = "Register `DSP_FLEXSPI_ACCESS_DISABLE` reader"]
2pub type R = crate::R<DspFlexspiAccessDisableSpec>;
3#[doc = "Register `DSP_FLEXSPI_ACCESS_DISABLE` writer"]
4pub type W = crate::W<DspFlexspiAccessDisableSpec>;
5#[doc = "no description available\n\nValue on reset: 0"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8pub enum DspFlexspiAccessDisable {
9 #[doc = "0: Enable DSP access to FLEXSPI"]
10 Enable = 0,
11 #[doc = "1: Disable DSP access to FLEXSPI"]
12 Disable = 1,
13}
14impl From<DspFlexspiAccessDisable> for bool {
15 #[inline(always)]
16 fn from(variant: DspFlexspiAccessDisable) -> Self {
17 variant as u8 != 0
18 }
19}
20#[doc = "Field `DSP_FLEXSPI_ACCESS_DISABLE` reader - no description available"]
21pub type DspFlexspiAccessDisableR = crate::BitReader<DspFlexspiAccessDisable>;
22impl DspFlexspiAccessDisableR {
23 #[doc = "Get enumerated values variant"]
24 #[inline(always)]
25 pub const fn variant(&self) -> DspFlexspiAccessDisable {
26 match self.bits {
27 false => DspFlexspiAccessDisable::Enable,
28 true => DspFlexspiAccessDisable::Disable,
29 }
30 }
31 #[doc = "Enable DSP access to FLEXSPI"]
32 #[inline(always)]
33 pub fn is_enable(&self) -> bool {
34 *self == DspFlexspiAccessDisable::Enable
35 }
36 #[doc = "Disable DSP access to FLEXSPI"]
37 #[inline(always)]
38 pub fn is_disable(&self) -> bool {
39 *self == DspFlexspiAccessDisable::Disable
40 }
41}
42#[doc = "Field `DSP_FLEXSPI_ACCESS_DISABLE` writer - no description available"]
43pub type DspFlexspiAccessDisableW<'a, REG> = crate::BitWriter<'a, REG, DspFlexspiAccessDisable>;
44impl<'a, REG> DspFlexspiAccessDisableW<'a, REG>
45where
46 REG: crate::Writable + crate::RegisterSpec,
47{
48 #[doc = "Enable DSP access to FLEXSPI"]
49 #[inline(always)]
50 pub fn enable(self) -> &'a mut crate::W<REG> {
51 self.variant(DspFlexspiAccessDisable::Enable)
52 }
53 #[doc = "Disable DSP access to FLEXSPI"]
54 #[inline(always)]
55 pub fn disable(self) -> &'a mut crate::W<REG> {
56 self.variant(DspFlexspiAccessDisable::Disable)
57 }
58}
59impl R {
60 #[doc = "Bit 0 - no description available"]
61 #[inline(always)]
62 pub fn dsp_flexspi_access_disable(&self) -> DspFlexspiAccessDisableR {
63 DspFlexspiAccessDisableR::new((self.bits & 1) != 0)
64 }
65}
66#[cfg(feature = "debug")]
67impl core::fmt::Debug for R {
68 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
69 f.debug_struct("DSP_FLEXSPI_ACCESS_DISABLE")
70 .field(
71 "dsp_flexspi_access_disable",
72 &self.dsp_flexspi_access_disable(),
73 )
74 .finish()
75 }
76}
77impl W {
78 #[doc = "Bit 0 - no description available"]
79 #[inline(always)]
80 pub fn dsp_flexspi_access_disable(
81 &mut self,
82 ) -> DspFlexspiAccessDisableW<DspFlexspiAccessDisableSpec> {
83 DspFlexspiAccessDisableW::new(self, 0)
84 }
85}
86#[doc = "DSP Flexspi access control\n\nYou can [`read`](crate::Reg::read) this register and get [`dsp_flexspi_access_disable::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dsp_flexspi_access_disable::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
87pub struct DspFlexspiAccessDisableSpec;
88impl crate::RegisterSpec for DspFlexspiAccessDisableSpec {
89 type Ux = u32;
90}
91#[doc = "`read()` method returns [`dsp_flexspi_access_disable::R`](R) reader structure"]
92impl crate::Readable for DspFlexspiAccessDisableSpec {}
93#[doc = "`write(|w| ..)` method takes [`dsp_flexspi_access_disable::W`](W) writer structure"]
94impl crate::Writable for DspFlexspiAccessDisableSpec {
95 type Safety = crate::Unsafe;
96 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
97 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
98}
99#[doc = "`reset()` method sets DSP_FLEXSPI_ACCESS_DISABLE to value 0"]
100impl crate::Resettable for DspFlexspiAccessDisableSpec {
101 const RESET_VALUE: u32 = 0;
102}