mimxrt685s_pac/mua/
cr.rs

1#[doc = "Register `CR` reader"]
2pub type R = crate::R<CrSpec>;
3#[doc = "Register `CR` writer"]
4pub type W = crate::W<CrSpec>;
5#[doc = "Fn\n\nValue on reset: 0"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8#[repr(u8)]
9pub enum Fn {
10    #[doc = "0: Clears the Fn bit in the SR register."]
11    Fn0 = 0,
12    #[doc = "1: Sets the Fn bit in the SR register."]
13    Fn1 = 1,
14}
15impl From<Fn> for u8 {
16    #[inline(always)]
17    fn from(variant: Fn) -> Self {
18        variant as _
19    }
20}
21impl crate::FieldSpec for Fn {
22    type Ux = u8;
23}
24impl crate::IsEnum for Fn {}
25#[doc = "Field `Fn` reader - Fn"]
26pub type FnR = crate::FieldReader<Fn>;
27impl FnR {
28    #[doc = "Get enumerated values variant"]
29    #[inline(always)]
30    pub const fn variant(&self) -> Option<Fn> {
31        match self.bits {
32            0 => Some(Fn::Fn0),
33            1 => Some(Fn::Fn1),
34            _ => None,
35        }
36    }
37    #[doc = "Clears the Fn bit in the SR register."]
38    #[inline(always)]
39    pub fn is_fn_0(&self) -> bool {
40        *self == Fn::Fn0
41    }
42    #[doc = "Sets the Fn bit in the SR register."]
43    #[inline(always)]
44    pub fn is_fn_1(&self) -> bool {
45        *self == Fn::Fn1
46    }
47}
48#[doc = "Field `Fn` writer - Fn"]
49pub type FnW<'a, REG> = crate::FieldWriter<'a, REG, 3, Fn>;
50impl<'a, REG> FnW<'a, REG>
51where
52    REG: crate::Writable + crate::RegisterSpec,
53    REG::Ux: From<u8>,
54{
55    #[doc = "Clears the Fn bit in the SR register."]
56    #[inline(always)]
57    pub fn fn_0(self) -> &'a mut crate::W<REG> {
58        self.variant(Fn::Fn0)
59    }
60    #[doc = "Sets the Fn bit in the SR register."]
61    #[inline(always)]
62    pub fn fn_1(self) -> &'a mut crate::W<REG> {
63        self.variant(Fn::Fn1)
64    }
65}
66#[doc = "MUR\n\nValue on reset: 0"]
67#[cfg_attr(feature = "defmt", derive(defmt::Format))]
68#[derive(Clone, Copy, Debug, PartialEq, Eq)]
69pub enum Mur {
70    #[doc = "0: N/A. Self clearing bit (default)."]
71    Mur0 = 0,
72    #[doc = "1: Asserts the MU reset."]
73    Mur1 = 1,
74}
75impl From<Mur> for bool {
76    #[inline(always)]
77    fn from(variant: Mur) -> Self {
78        variant as u8 != 0
79    }
80}
81#[doc = "Field `MUR` reader - MUR"]
82pub type MurR = crate::BitReader<Mur>;
83impl MurR {
84    #[doc = "Get enumerated values variant"]
85    #[inline(always)]
86    pub const fn variant(&self) -> Mur {
87        match self.bits {
88            false => Mur::Mur0,
89            true => Mur::Mur1,
90        }
91    }
92    #[doc = "N/A. Self clearing bit (default)."]
93    #[inline(always)]
94    pub fn is_mur_0(&self) -> bool {
95        *self == Mur::Mur0
96    }
97    #[doc = "Asserts the MU reset."]
98    #[inline(always)]
99    pub fn is_mur_1(&self) -> bool {
100        *self == Mur::Mur1
101    }
102}
103#[doc = "Field `MUR` writer - MUR"]
104pub type MurW<'a, REG> = crate::BitWriter<'a, REG, Mur>;
105impl<'a, REG> MurW<'a, REG>
106where
107    REG: crate::Writable + crate::RegisterSpec,
108{
109    #[doc = "N/A. Self clearing bit (default)."]
110    #[inline(always)]
111    pub fn mur_0(self) -> &'a mut crate::W<REG> {
112        self.variant(Mur::Mur0)
113    }
114    #[doc = "Asserts the MU reset."]
115    #[inline(always)]
116    pub fn mur_1(self) -> &'a mut crate::W<REG> {
117        self.variant(Mur::Mur1)
118    }
119}
120#[doc = "BRDIE\n\nValue on reset: 0"]
121#[cfg_attr(feature = "defmt", derive(defmt::Format))]
122#[derive(Clone, Copy, Debug, PartialEq, Eq)]
123pub enum Rdie {
124    #[doc = "0: Disables Processor A General Purpose Interrupt 3 request due to Processor B reset de-assertion."]
125    Rdie0 = 0,
126    #[doc = "1: Enables Processor A General Purpose Interrupt 3 request due to Processor B reset de-assertion."]
127    Rdie1 = 1,
128}
129impl From<Rdie> for bool {
130    #[inline(always)]
131    fn from(variant: Rdie) -> Self {
132        variant as u8 != 0
133    }
134}
135#[doc = "Field `RDIE` reader - BRDIE"]
136pub type RdieR = crate::BitReader<Rdie>;
137impl RdieR {
138    #[doc = "Get enumerated values variant"]
139    #[inline(always)]
140    pub const fn variant(&self) -> Rdie {
141        match self.bits {
142            false => Rdie::Rdie0,
143            true => Rdie::Rdie1,
144        }
145    }
146    #[doc = "Disables Processor A General Purpose Interrupt 3 request due to Processor B reset de-assertion."]
147    #[inline(always)]
148    pub fn is_rdie_0(&self) -> bool {
149        *self == Rdie::Rdie0
150    }
151    #[doc = "Enables Processor A General Purpose Interrupt 3 request due to Processor B reset de-assertion."]
152    #[inline(always)]
153    pub fn is_rdie_1(&self) -> bool {
154        *self == Rdie::Rdie1
155    }
156}
157#[doc = "Field `RDIE` writer - BRDIE"]
158pub type RdieW<'a, REG> = crate::BitWriter<'a, REG, Rdie>;
159impl<'a, REG> RdieW<'a, REG>
160where
161    REG: crate::Writable + crate::RegisterSpec,
162{
163    #[doc = "Disables Processor A General Purpose Interrupt 3 request due to Processor B reset de-assertion."]
164    #[inline(always)]
165    pub fn rdie_0(self) -> &'a mut crate::W<REG> {
166        self.variant(Rdie::Rdie0)
167    }
168    #[doc = "Enables Processor A General Purpose Interrupt 3 request due to Processor B reset de-assertion."]
169    #[inline(always)]
170    pub fn rdie_1(self) -> &'a mut crate::W<REG> {
171        self.variant(Rdie::Rdie1)
172    }
173}
174#[doc = "RAIE\n\nValue on reset: 0"]
175#[cfg_attr(feature = "defmt", derive(defmt::Format))]
176#[derive(Clone, Copy, Debug, PartialEq, Eq)]
177pub enum Raie {
178    #[doc = "0: Disables Processor A General Purpose Interrupt 3 request due to Processor B reset assertion."]
179    Raie0 = 0,
180    #[doc = "1: Enables Processor A General Purpose Interrupt 3 request due to Processor B reset assertion."]
181    Raie1 = 1,
182}
183impl From<Raie> for bool {
184    #[inline(always)]
185    fn from(variant: Raie) -> Self {
186        variant as u8 != 0
187    }
188}
189#[doc = "Field `RAIE` reader - RAIE"]
190pub type RaieR = crate::BitReader<Raie>;
191impl RaieR {
192    #[doc = "Get enumerated values variant"]
193    #[inline(always)]
194    pub const fn variant(&self) -> Raie {
195        match self.bits {
196            false => Raie::Raie0,
197            true => Raie::Raie1,
198        }
199    }
200    #[doc = "Disables Processor A General Purpose Interrupt 3 request due to Processor B reset assertion."]
201    #[inline(always)]
202    pub fn is_raie_0(&self) -> bool {
203        *self == Raie::Raie0
204    }
205    #[doc = "Enables Processor A General Purpose Interrupt 3 request due to Processor B reset assertion."]
206    #[inline(always)]
207    pub fn is_raie_1(&self) -> bool {
208        *self == Raie::Raie1
209    }
210}
211#[doc = "Field `RAIE` writer - RAIE"]
212pub type RaieW<'a, REG> = crate::BitWriter<'a, REG, Raie>;
213impl<'a, REG> RaieW<'a, REG>
214where
215    REG: crate::Writable + crate::RegisterSpec,
216{
217    #[doc = "Disables Processor A General Purpose Interrupt 3 request due to Processor B reset assertion."]
218    #[inline(always)]
219    pub fn raie_0(self) -> &'a mut crate::W<REG> {
220        self.variant(Raie::Raie0)
221    }
222    #[doc = "Enables Processor A General Purpose Interrupt 3 request due to Processor B reset assertion."]
223    #[inline(always)]
224    pub fn raie_1(self) -> &'a mut crate::W<REG> {
225        self.variant(Raie::Raie1)
226    }
227}
228#[doc = "GIRn\n\nValue on reset: 0"]
229#[cfg_attr(feature = "defmt", derive(defmt::Format))]
230#[derive(Clone, Copy, Debug, PartialEq, Eq)]
231#[repr(u8)]
232pub enum Girn {
233    #[doc = "0: MUA General Interrupt n is not requested to the MUB (default)."]
234    Girn0 = 0,
235    #[doc = "1: MUA General Interrupt n is requested to the MUB."]
236    Girn1 = 1,
237}
238impl From<Girn> for u8 {
239    #[inline(always)]
240    fn from(variant: Girn) -> Self {
241        variant as _
242    }
243}
244impl crate::FieldSpec for Girn {
245    type Ux = u8;
246}
247impl crate::IsEnum for Girn {}
248#[doc = "Field `GIRn` reader - GIRn"]
249pub type GirnR = crate::FieldReader<Girn>;
250impl GirnR {
251    #[doc = "Get enumerated values variant"]
252    #[inline(always)]
253    pub const fn variant(&self) -> Option<Girn> {
254        match self.bits {
255            0 => Some(Girn::Girn0),
256            1 => Some(Girn::Girn1),
257            _ => None,
258        }
259    }
260    #[doc = "MUA General Interrupt n is not requested to the MUB (default)."]
261    #[inline(always)]
262    pub fn is_girn_0(&self) -> bool {
263        *self == Girn::Girn0
264    }
265    #[doc = "MUA General Interrupt n is requested to the MUB."]
266    #[inline(always)]
267    pub fn is_girn_1(&self) -> bool {
268        *self == Girn::Girn1
269    }
270}
271#[doc = "Field `GIRn` writer - GIRn"]
272pub type GirnW<'a, REG> = crate::FieldWriter<'a, REG, 4, Girn>;
273impl<'a, REG> GirnW<'a, REG>
274where
275    REG: crate::Writable + crate::RegisterSpec,
276    REG::Ux: From<u8>,
277{
278    #[doc = "MUA General Interrupt n is not requested to the MUB (default)."]
279    #[inline(always)]
280    pub fn girn_0(self) -> &'a mut crate::W<REG> {
281        self.variant(Girn::Girn0)
282    }
283    #[doc = "MUA General Interrupt n is requested to the MUB."]
284    #[inline(always)]
285    pub fn girn_1(self) -> &'a mut crate::W<REG> {
286        self.variant(Girn::Girn1)
287    }
288}
289#[doc = "TIEn\n\nValue on reset: 0"]
290#[cfg_attr(feature = "defmt", derive(defmt::Format))]
291#[derive(Clone, Copy, Debug, PartialEq, Eq)]
292#[repr(u8)]
293pub enum Tien {
294    #[doc = "0: Disables MUA Transmit Interrupt n. (default)"]
295    Tien0 = 0,
296    #[doc = "1: Enables MUA Transmit Interrupt n."]
297    Tien1 = 1,
298}
299impl From<Tien> for u8 {
300    #[inline(always)]
301    fn from(variant: Tien) -> Self {
302        variant as _
303    }
304}
305impl crate::FieldSpec for Tien {
306    type Ux = u8;
307}
308impl crate::IsEnum for Tien {}
309#[doc = "Field `TIEn` reader - TIEn"]
310pub type TienR = crate::FieldReader<Tien>;
311impl TienR {
312    #[doc = "Get enumerated values variant"]
313    #[inline(always)]
314    pub const fn variant(&self) -> Option<Tien> {
315        match self.bits {
316            0 => Some(Tien::Tien0),
317            1 => Some(Tien::Tien1),
318            _ => None,
319        }
320    }
321    #[doc = "Disables MUA Transmit Interrupt n. (default)"]
322    #[inline(always)]
323    pub fn is_tien_0(&self) -> bool {
324        *self == Tien::Tien0
325    }
326    #[doc = "Enables MUA Transmit Interrupt n."]
327    #[inline(always)]
328    pub fn is_tien_1(&self) -> bool {
329        *self == Tien::Tien1
330    }
331}
332#[doc = "Field `TIEn` writer - TIEn"]
333pub type TienW<'a, REG> = crate::FieldWriter<'a, REG, 4, Tien>;
334impl<'a, REG> TienW<'a, REG>
335where
336    REG: crate::Writable + crate::RegisterSpec,
337    REG::Ux: From<u8>,
338{
339    #[doc = "Disables MUA Transmit Interrupt n. (default)"]
340    #[inline(always)]
341    pub fn tien_0(self) -> &'a mut crate::W<REG> {
342        self.variant(Tien::Tien0)
343    }
344    #[doc = "Enables MUA Transmit Interrupt n."]
345    #[inline(always)]
346    pub fn tien_1(self) -> &'a mut crate::W<REG> {
347        self.variant(Tien::Tien1)
348    }
349}
350#[doc = "RIEn\n\nValue on reset: 0"]
351#[cfg_attr(feature = "defmt", derive(defmt::Format))]
352#[derive(Clone, Copy, Debug, PartialEq, Eq)]
353#[repr(u8)]
354pub enum Rien {
355    #[doc = "0: Disables MUA Receive Interrupt n. (default)"]
356    Rien0 = 0,
357    #[doc = "1: Enables MUA Receive Interrupt n."]
358    Rien1 = 1,
359}
360impl From<Rien> for u8 {
361    #[inline(always)]
362    fn from(variant: Rien) -> Self {
363        variant as _
364    }
365}
366impl crate::FieldSpec for Rien {
367    type Ux = u8;
368}
369impl crate::IsEnum for Rien {}
370#[doc = "Field `RIEn` reader - RIEn"]
371pub type RienR = crate::FieldReader<Rien>;
372impl RienR {
373    #[doc = "Get enumerated values variant"]
374    #[inline(always)]
375    pub const fn variant(&self) -> Option<Rien> {
376        match self.bits {
377            0 => Some(Rien::Rien0),
378            1 => Some(Rien::Rien1),
379            _ => None,
380        }
381    }
382    #[doc = "Disables MUA Receive Interrupt n. (default)"]
383    #[inline(always)]
384    pub fn is_rien_0(&self) -> bool {
385        *self == Rien::Rien0
386    }
387    #[doc = "Enables MUA Receive Interrupt n."]
388    #[inline(always)]
389    pub fn is_rien_1(&self) -> bool {
390        *self == Rien::Rien1
391    }
392}
393#[doc = "Field `RIEn` writer - RIEn"]
394pub type RienW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rien>;
395impl<'a, REG> RienW<'a, REG>
396where
397    REG: crate::Writable + crate::RegisterSpec,
398    REG::Ux: From<u8>,
399{
400    #[doc = "Disables MUA Receive Interrupt n. (default)"]
401    #[inline(always)]
402    pub fn rien_0(self) -> &'a mut crate::W<REG> {
403        self.variant(Rien::Rien0)
404    }
405    #[doc = "Enables MUA Receive Interrupt n."]
406    #[inline(always)]
407    pub fn rien_1(self) -> &'a mut crate::W<REG> {
408        self.variant(Rien::Rien1)
409    }
410}
411#[doc = "GIEn\n\nValue on reset: 0"]
412#[cfg_attr(feature = "defmt", derive(defmt::Format))]
413#[derive(Clone, Copy, Debug, PartialEq, Eq)]
414#[repr(u8)]
415pub enum Gien {
416    #[doc = "0: Disables MUA General Interrupt n. (default)"]
417    Gien0 = 0,
418    #[doc = "1: Enables MUA General Interrupt n."]
419    Gien1 = 1,
420}
421impl From<Gien> for u8 {
422    #[inline(always)]
423    fn from(variant: Gien) -> Self {
424        variant as _
425    }
426}
427impl crate::FieldSpec for Gien {
428    type Ux = u8;
429}
430impl crate::IsEnum for Gien {}
431#[doc = "Field `GIEn` reader - GIEn"]
432pub type GienR = crate::FieldReader<Gien>;
433impl GienR {
434    #[doc = "Get enumerated values variant"]
435    #[inline(always)]
436    pub const fn variant(&self) -> Option<Gien> {
437        match self.bits {
438            0 => Some(Gien::Gien0),
439            1 => Some(Gien::Gien1),
440            _ => None,
441        }
442    }
443    #[doc = "Disables MUA General Interrupt n. (default)"]
444    #[inline(always)]
445    pub fn is_gien_0(&self) -> bool {
446        *self == Gien::Gien0
447    }
448    #[doc = "Enables MUA General Interrupt n."]
449    #[inline(always)]
450    pub fn is_gien_1(&self) -> bool {
451        *self == Gien::Gien1
452    }
453}
454#[doc = "Field `GIEn` writer - GIEn"]
455pub type GienW<'a, REG> = crate::FieldWriter<'a, REG, 4, Gien>;
456impl<'a, REG> GienW<'a, REG>
457where
458    REG: crate::Writable + crate::RegisterSpec,
459    REG::Ux: From<u8>,
460{
461    #[doc = "Disables MUA General Interrupt n. (default)"]
462    #[inline(always)]
463    pub fn gien_0(self) -> &'a mut crate::W<REG> {
464        self.variant(Gien::Gien0)
465    }
466    #[doc = "Enables MUA General Interrupt n."]
467    #[inline(always)]
468    pub fn gien_1(self) -> &'a mut crate::W<REG> {
469        self.variant(Gien::Gien1)
470    }
471}
472impl R {
473    #[doc = "Bits 0:2 - Fn"]
474    #[inline(always)]
475    pub fn fn_(&self) -> FnR {
476        FnR::new((self.bits & 7) as u8)
477    }
478    #[doc = "Bit 5 - MUR"]
479    #[inline(always)]
480    pub fn mur(&self) -> MurR {
481        MurR::new(((self.bits >> 5) & 1) != 0)
482    }
483    #[doc = "Bit 6 - BRDIE"]
484    #[inline(always)]
485    pub fn rdie(&self) -> RdieR {
486        RdieR::new(((self.bits >> 6) & 1) != 0)
487    }
488    #[doc = "Bit 12 - RAIE"]
489    #[inline(always)]
490    pub fn raie(&self) -> RaieR {
491        RaieR::new(((self.bits >> 12) & 1) != 0)
492    }
493    #[doc = "Bits 16:19 - GIRn"]
494    #[inline(always)]
495    pub fn girn(&self) -> GirnR {
496        GirnR::new(((self.bits >> 16) & 0x0f) as u8)
497    }
498    #[doc = "Bits 20:23 - TIEn"]
499    #[inline(always)]
500    pub fn tien(&self) -> TienR {
501        TienR::new(((self.bits >> 20) & 0x0f) as u8)
502    }
503    #[doc = "Bits 24:27 - RIEn"]
504    #[inline(always)]
505    pub fn rien(&self) -> RienR {
506        RienR::new(((self.bits >> 24) & 0x0f) as u8)
507    }
508    #[doc = "Bits 28:31 - GIEn"]
509    #[inline(always)]
510    pub fn gien(&self) -> GienR {
511        GienR::new(((self.bits >> 28) & 0x0f) as u8)
512    }
513}
514#[cfg(feature = "debug")]
515impl core::fmt::Debug for R {
516    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
517        f.debug_struct("CR")
518            .field("fn_", &self.fn_())
519            .field("mur", &self.mur())
520            .field("rdie", &self.rdie())
521            .field("raie", &self.raie())
522            .field("girn", &self.girn())
523            .field("tien", &self.tien())
524            .field("rien", &self.rien())
525            .field("gien", &self.gien())
526            .finish()
527    }
528}
529impl W {
530    #[doc = "Bits 0:2 - Fn"]
531    #[inline(always)]
532    pub fn fn_(&mut self) -> FnW<CrSpec> {
533        FnW::new(self, 0)
534    }
535    #[doc = "Bit 5 - MUR"]
536    #[inline(always)]
537    pub fn mur(&mut self) -> MurW<CrSpec> {
538        MurW::new(self, 5)
539    }
540    #[doc = "Bit 6 - BRDIE"]
541    #[inline(always)]
542    pub fn rdie(&mut self) -> RdieW<CrSpec> {
543        RdieW::new(self, 6)
544    }
545    #[doc = "Bit 12 - RAIE"]
546    #[inline(always)]
547    pub fn raie(&mut self) -> RaieW<CrSpec> {
548        RaieW::new(self, 12)
549    }
550    #[doc = "Bits 16:19 - GIRn"]
551    #[inline(always)]
552    pub fn girn(&mut self) -> GirnW<CrSpec> {
553        GirnW::new(self, 16)
554    }
555    #[doc = "Bits 20:23 - TIEn"]
556    #[inline(always)]
557    pub fn tien(&mut self) -> TienW<CrSpec> {
558        TienW::new(self, 20)
559    }
560    #[doc = "Bits 24:27 - RIEn"]
561    #[inline(always)]
562    pub fn rien(&mut self) -> RienW<CrSpec> {
563        RienW::new(self, 24)
564    }
565    #[doc = "Bits 28:31 - GIEn"]
566    #[inline(always)]
567    pub fn gien(&mut self) -> GienW<CrSpec> {
568        GienW::new(self, 28)
569    }
570}
571#[doc = "Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
572pub struct CrSpec;
573impl crate::RegisterSpec for CrSpec {
574    type Ux = u32;
575}
576#[doc = "`read()` method returns [`cr::R`](R) reader structure"]
577impl crate::Readable for CrSpec {}
578#[doc = "`write(|w| ..)` method takes [`cr::W`](W) writer structure"]
579impl crate::Writable for CrSpec {
580    type Safety = crate::Unsafe;
581    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
582    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
583}
584#[doc = "`reset()` method sets CR to value 0x0100"]
585impl crate::Resettable for CrSpec {
586    const RESET_VALUE: u32 = 0x0100;
587}
mimxrt685s_pac/mua/cr.rs

mimxrt685s_pac/mua/
cr.rs
