mimxrt685s_pac/dma0/
busy0.rs

1#[doc = "Register `BUSY0` reader"]
2pub type R = crate::R<Busy0Spec>;
3#[doc = "Busy flag for DMA channel 0.\n\nValue on reset: 0"]
4#[cfg_attr(feature = "defmt", derive(defmt::Format))]
5#[derive(Clone, Copy, Debug, PartialEq, Eq)]
6#[repr(u32)]
7pub enum Bsy {
8    #[doc = "0: DMAchannel 0 is not busy."]
9    NotBusy = 0,
10    #[doc = "1: DMAchannel 0 is busy."]
11    Busy = 1,
12}
13impl From<Bsy> for u32 {
14    #[inline(always)]
15    fn from(variant: Bsy) -> Self {
16        variant as _
17    }
18}
19impl crate::FieldSpec for Bsy {
20    type Ux = u32;
21}
22impl crate::IsEnum for Bsy {}
23#[doc = "Field `BSY` reader - Busy flag for DMA channel 0."]
24pub type BsyR = crate::FieldReader<Bsy>;
25impl BsyR {
26    #[doc = "Get enumerated values variant"]
27    #[inline(always)]
28    pub const fn variant(&self) -> Option<Bsy> {
29        match self.bits {
30            0 => Some(Bsy::NotBusy),
31            1 => Some(Bsy::Busy),
32            _ => None,
33        }
34    }
35    #[doc = "DMAchannel 0 is not busy."]
36    #[inline(always)]
37    pub fn is_not_busy(&self) -> bool {
38        *self == Bsy::NotBusy
39    }
40    #[doc = "DMAchannel 0 is busy."]
41    #[inline(always)]
42    pub fn is_busy(&self) -> bool {
43        *self == Bsy::Busy
44    }
45}
46impl R {
47    #[doc = "Bits 0:31 - Busy flag for DMA channel 0."]
48    #[inline(always)]
49    pub fn bsy(&self) -> BsyR {
50        BsyR::new(self.bits)
51    }
52}
53#[cfg(feature = "debug")]
54impl core::fmt::Debug for R {
55    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
56        f.debug_struct("BUSY0").field("bsy", &self.bsy()).finish()
57    }
58}
59#[doc = "Channel Busy status for all DMA channels.\n\nYou can [`read`](crate::Reg::read) this register and get [`busy0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
60pub struct Busy0Spec;
61impl crate::RegisterSpec for Busy0Spec {
62    type Ux = u32;
63}
64#[doc = "`read()` method returns [`busy0::R`](R) reader structure"]
65impl crate::Readable for Busy0Spec {}
66#[doc = "`reset()` method sets BUSY0 to value 0"]
67impl crate::Resettable for Busy0Spec {
68    const RESET_VALUE: u32 = 0;
69}
mimxrt685s_pac/dma0/busy0.rs

mimxrt685s_pac/dma0/
busy0.rs
