The index within the main trace of the bitwise column holding the aggregated value of input a
.
The index range within the main trace for the bit decomposition of a
for bitwise operations.
The index within the main trace of the bitwise column holding the aggregated value of input b
.
The index range within the main trace for the bit decomposition of b
for bitwise operations.
The index within the main trace of the bitwise column containing the aggregated output value.
The index within the main trace of the bitwise column containing the aggregated output value of
the previous row.
The index within the main trace of the bitwise column containing selector indicating the
type of bitwise operation (AND or XOR)
The first column of the bitwise chiplet.
The column index range for the main trace of the bitwise column
The range of columns in the execution trace that contains the capacity portion of the hasher
state.
The index of the hasher’s node index column in the execution trace.
The range of columns in the execution trace that contains the rate portion of the hasher state.
The column index range in the execution trace containing the selector columns in the hasher.
The range of columns in the execution trace that contain the hasher’s state.
The first column of the hash chiplet.
The index within the main trace of the column containing the memory address.
The index within the main trace of the column containing the clock cycle of the memory
access.
The index within the main trace of the column containing the memory context.
The column index within the main trace for the lower 16-bits of the delta between two
consecutive memory context IDs, addresses, or clock cycles.
The column index within the main trace for the upper 16-bits of the delta between two
consecutive memory context IDs, addresses, or clock cycles.
The column index within the main trace for the inverse of the delta between two consecutive
memory context IDs, addresses, or clock cycles, used to enforce that changes are correctly
constrained.
The index within the main trace of the column containing the first memory selector, which
indicates the operation (read or write).
The first column of the memory chiplet.
The column index range within the main trace which holds the memory value elements.
The number of columns in the chiplets which are used as selectors for the bitwise chiplet.
The number of columns in the chiplets which are used as selectors for the hasher chiplet.
The number of columns in the chiplets which are used as selectors for the kernel ROM chiplet.
The number of columns in the chiplets which are used as selectors for the memory chiplet.