Struct microbit::hal::twis::Twis

pub struct Twis<T>(_)
 where
    T: Instance;

Interface to a TWIS instance.

Implementations

impl<T> Twis<T> where
    T: Instance, 

pub fn new(twis: T, pins: Pins, address0: u8) -> Twis<T>

pub fn set_address1(&self, address1: u8) -> &Twis<T>

Configures secondary I2C address.

pub fn set_orc(&self, orc: u8) -> &Twis<T>

Sets the over-read character (character sent on over-read of the transmit buffer).

pub fn enable(&self) -> &Twis<T>

Enables the TWIS instance.

pub fn disable(&self) -> &Twis<T>

Disables the TWIS instance.

pub fn stop(&self) -> &Twis<T>

Stops the TWI transaction and waits until it has stopped.

pub fn enable_interrupt(&self, event: TwiEvent) -> &Twis<T>

Enables interrupt for specified command.

pub fn disable_interrupt(&self, event: TwiEvent) -> &Twis<T>

Disables interrupt for specified command.

pub fn reset_events(&self)

Resets read and write events.

pub fn reset_event(&self, event: TwiEvent)

Resets specified event.

pub fn address_match(&self) -> u8

Returns matched address for latest command.

pub fn is_event_triggered(&self, event: TwiEvent) -> bool

Checks if specified event has been triggered.

pub fn is_done(&self) -> bool

Checks if the TWI transaction is done.

pub fn amount(&self) -> u32

Returns number of bytes received in last granted transaction.

pub fn is_overflow(&self) -> bool

Checks if RX buffer overflow was detected.

pub fn is_data_nack(&self) -> bool

Checks if NACK was sent after receiving a data byte.

pub fn is_overread(&self) -> bool

Checks if TX buffer over-read was detected and ORC was clocked out.

pub fn event_read(&self) -> &Reg<u32, _EVENTS_READ>

Returns reference to READ event endpoint for PPI.

pub fn event_write(&self) -> &Reg<u32, _EVENTS_WRITE>

Returns reference to WRITE event endpoint for PPI.

pub fn event_stopped(&self) -> &Reg<u32, _EVENTS_STOPPED>

Returns reference to STOPPED event endpoint for PPI.

pub fn event_error(&self) -> &Reg<u32, _EVENTS_ERROR>

Returns reference to ERROR event endpoint for PPI.

pub fn event_rx_started(&self) -> &Reg<u32, _EVENTS_RXSTARTED>

Returns reference to RXSTARTED event endpoint for PPI.

pub fn event_tx_started(&self) -> &Reg<u32, _EVENTS_TXSTARTED>

Returns reference to TXSTARTED event endpoint for PPI.

pub fn task_stop(&self) -> &Reg<u32, _TASKS_STOP>

Returns reference to STOP task endpoint for PPI.

pub fn task_suspend(&self) -> &Reg<u32, _TASKS_SUSPEND>

Returns reference to SUSPEND task endpoint for PPI.

pub fn task_resume(&self) -> &Reg<u32, _TASKS_RESUME>

Returns reference to RESUME task endpoint for PPI.

pub fn task_prepare_rx(&self) -> &Reg<u32, _TASKS_PREPARERX>

Returns reference to PREPARERX task endpoint for PPI.

pub fn task_prepare_tx(&self) -> &Reg<u32, _TASKS_PREPARETX>

Returns reference to PREPARETX task endpoint for PPI.

pub fn tx_blocking(&mut self, buffer: &[u8]) -> Result<(), Error>

Write to an I2C controller.

The buffer must reside in RAM and have a length of at most 255 bytes on the nRF52832 and at most 65535 bytes on the nRF52840.

pub fn rx_blocking(&mut self, buffer: &mut [u8]) -> Result<(), Error>

Read from an I2C controller.

The buffer must have a length of at most 255 bytes on the nRF52832 and at most 65535 bytes on the nRF52840.

pub fn rx<W, B>(self, buffer: B) -> Result<Transfer<T, B>, Error> where
    B: 'static + WriteBuffer<Word = W>, 

Receives data into the given buffer. Buffer must be located in RAM. Returns a value that represents the in-progress DMA transfer.

pub fn tx<W, B>(self, buffer: B) -> Result<Transfer<T, B>, Error> where
    B: 'static + ReadBuffer<Word = W>, 

Transmits data from the given buffer. Buffer must be located in RAM. Returns a value that represents the in-progress DMA transfer.

pub fn free(self) -> T

Return the raw interface to the underlying TWIS peripheral.