Module mcxn947_pac::trng0

source ·
Expand description

TRNG0

Modules§

Structs§

Type Aliases§

  • CSCLR (w) register accessor: Common Security Clear Register
  • CSER (r) register accessor: Common Security Error Register
  • ENT (r) register accessor: Entropy Read Register
  • INT_CTRL (rw) register accessor: Interrupt Control Register
  • INT_MASK (rw) register accessor: Mask Register
  • INT_STATUS (r) register accessor: Interrupt Status Register
  • MAX_CNT_FRQCNT (r) register accessor: Frequency Count Register
  • MAX_CNT_FRQMAX (rw) register accessor: Frequency Count Maximum Limit Register
  • MCTL (rw) register accessor: Miscellaneous Control Register
  • MIN_CNT_FRQMIN (rw) register accessor: Frequency Count Minimum Limit Register
  • MIN_CNT_OSC2_FRQCNT (r) register accessor: Oscillator-2 Frequency Count Register
  • OSC2_CTL (rw) register accessor: TRNG Oscillator 2 Control Register
  • SCMISC (rw) register accessor: Statistical Check Miscellaneous Register
  • SCML_MC_SCMC (r) register accessor: Statistical Check Monobit Count Register
  • SCML_MC_SCML (rw) register accessor: Statistical Check Monobit Limit Register
  • SCR1L_1C_SCR1C (r) register accessor: Statistical Check Run Length 1 Count Register
  • SCR1L_1C_SCR1L (rw) register accessor: Statistical Check Run Length 1 Limit Register
  • SCR2L_2C_SCR2C (r) register accessor: Statistical Check Run Length 2 Count Register
  • SCR2L_2C_SCR2L (rw) register accessor: Statistical Check Run Length 2 Limit Register
  • SCR3L_3C_SCR3C (r) register accessor: Statistical Check Run Length 3 Count Register
  • SCR3L_3C_SCR3L (rw) register accessor: Statistical Check Run Length 3 Limit Register
  • SDCTL (rw) register accessor: Seed Control Register
  • SEC_CFG (rw) register accessor: Security Configuration Register
  • STATUS (r) register accessor: Status Register
  • VID1 (r) register accessor: Version ID Register (MS)
  • VID2 (r) register accessor: Version ID Register (LS)