Module mcxn947_pac::syscon0

SYSCON

Re-exports

• pub use self::cmp::CMP;

Modules

• adc0clkdiv
  ADC0 Clock Divider
• adc0clksel
  ADC0 Clock Source Select
• adc1clkdiv
  ADC1 Clock Divider
• adc1clksel
  ADC1 Clock Source Select
• ahbclkctrl0
  AHB Clock Control 0
• ahbclkctrl1
  AHB Clock Control 1
• ahbclkctrl2
  AHB Clock Control 2
• ahbclkctrl3
  AHB Clock Control 3
• ahbclkctrlclr
  AHB Clock Control Clear
• ahbclkctrlset
  AHB Clock Control Set
• ahbclkdiv
  System Clock Divider
• ahbmatprio
  AHB Matrix Priority Control
• autoclkgateoverride
  Control Automatic Clock Gating
• autoclkgateoverridec
  Control Automatic Clock Gating C
• binary_code_lsb
  Gray to Binary Converter Binary Code [31:0]
• binary_code_msb
  Gray to Binary Converter Binary Code [41:32]
• clkout_frgctrl
  CLKOUT FRG Control
• clkoutdiv
  CLKOUT Clock Divider
• clkoutsel
  CLKOUT Clock Source Select
• clkunlock
  Clock Configuration Unlock
• clock_ctrl
  Clock Control
• cmp
  Cluster Cluster CMP%s, containing CMP?FCLKSEL, CMP?FCLKDIV, CMP?RRCLKSEL, CMP?RRCLKDIV
• cpboot
  Coprocessor Boot Address
• cpu0nstckcal
  Non-Secure CPU0 System Tick Calibration
• cpu0stckcal
  Secure CPU0 System Tick Calibration
• cpu1stckcal
  System tick calibration for CPU1
• cpuctrl
  CPU Control for Multiple Processors
• cpustat
  CPU Status
• ctimerclkdiv
  CTimer Clock Divider
• ctimerclksel
  CTIMER Clock Source Select
• ctimerglobalstarten
  CTIMER Global Start Enable
• dac0clkdiv
  DAC0 functional clock divider
• dac0clksel
  DAC0 Functional Clock Selection
• dac1clkdiv
  DAC1 functional clock divider
• dac1clksel
  DAC1 Functional Clock Selection
• dac2clkdiv
  DAC2 functional clock divider
• dac2clksel
  DAC2 Functional Clock Selection
• debug_auth_beacon
  Debug Authentication BEACON
• debug_features
  Cortex Debug Features Control
• debug_features_dp
  Cortex Debug Features Control (Duplicate)
• debug_lock_en
  Control Write Access to Security
• device_id0
  Device ID
• device_type
  Device Type
• dieid
  Chip Revision ID and Number
• ecc_enable_ctrl
  RAM ECC Enable Control
• els_as_boot_log0
  Boot state captured during boot: Main ROM log
• els_as_boot_log1
  Boot state captured during boot: N-boot library log
• els_as_boot_log2
  Boot state captured during boot: Hardware status signals log
• els_as_boot_log3
  Boot state captured during boot: Security log
• els_as_cfg0
  ELS AS Configuration
• els_as_cfg1
  ELS AS Configuration1
• els_as_cfg2
  ELS AS Configuration2
• els_as_cfg3
  ELS AS Configuration3
• els_as_flag0
  ELS AS Flag0
• els_as_flag1
  ELS AS Flag1
• els_as_st0
  ELS AS State Register
• els_as_st1
  ELS AS State1
• els_kdf_mask
  Key Derivation Function Mask
• els_otp_lc_state
  Life Cycle State Register
• els_otp_lc_state_dp
  Life Cycle State Register (Duplicate)
• els_temporal_state
  ELS Temporal State
• emvsimclkdiv
  EMVSIM%s Function Clock Division
• emvsimclksel
  EMVSIM%s Clock Source Select
• enet_phy_intf_sel
  Ethernet PHY Interface Select
• enet_sbd_flow_ctrl
  Sideband Flow Control
• enetptprefclkdiv
  Ethernet PTP REF Function Clock Divider
• enetptprefclksel
  Ethernet PTP REF Clock Selection
• enetrmiiclkdiv
  Ethernet RMII Function Clock Divider
• enetrmiiclksel
  Ethernet RMII Clock Selection
• etb_counter_ctrl
  ETB Counter Control Register
• etb_counter_reload
  ETB Counter Reload Register
• etb_counter_value
  ETB Counter Value Register
• etb_status
  ETB Counter Status Register
• ewm0clksel
  EWM0 Clock Selection
• fcclksel
  LP_FLEXCOMM Clock Source Select for Fractional Rate Divider
• flex_spiclkdiv
  FlexSPI Clock Divider
• flex_spiclksel
  FlexSPI Clock Selection
• flexcan0clkdiv
  FLEXCAN0 Function Clock Divider
• flexcan0clksel
  FLEXCAN0 Clock Selection
• flexcan1clkdiv
  FLEXCAN1 Function Clock Divider
• flexcan1clksel
  FLEXCAN1 Clock Selection
• flexcommclkdiv
  LP_FLEXCOMM Clock Divider
• flexioclkdiv
  FLEXIO Function Clock Divider
• flexioclksel
  FLEXIO Clock Selection
• frohfdiv
  FRO_HF_DIV Clock Divider
• gdet_ctrl
  GDET Control Register
• gray_code_lsb
  Gray to Binary Converter Gray code_gray[31:0]
• gray_code_msb
  Gray to Binary Converter Gray code_gray[41:32]
• i3c0fclkdiv
  I3C0 Functional Clock FCLK Divider
• i3c0fclksdiv
  I3C0 FCLK Slow Clock Divider
• i3c0fclksel
  I3C0 Functional Clock Selection
• i3c0fclkssel
  I3C0 FCLK Slow Selection
• i3c0fclkstcdiv
  I3C0 FCLK_STC Clock Divider
• i3c0fclkstcsel
  I3C0 FCLK_STC Clock Selection
• i3c1fclkdiv
  I3C1 Functional Clock FCLK Divider
• i3c1fclksdiv
  I3C1 FCLK Slow clock Divider
• i3c1fclksel
  I3C1 Functional Clock Selection
• i3c1fclkssel
  I3C1 FCLK Slow Selection
• i3c1fclkstcdiv
  I3C1 FCLK_STC Clock Divider
• i3c1fclkstcsel
  Selects the I3C1 Time Control clock
• jtag_id
  JTAG Chip ID
• key_retain_ctrl
  Key Retain Control
• lpcac_ctrl
  LPCAC Control
• micfilfclkdiv
  MICFIL Clock Division
• micfilfclksel
  MICFIL Clock Selection
• nmisrc
  NMI Source Select
• nvm_ctrl
  NVM Control
• ostimerclksel
  OSTIMER Clock Selection
• pll1clkdiv
  PLL1 Clock %s Divider
• pllclkdiv
  PLL Clock Divider
• pllclkdivsel
  PLL Clock Divider Clock Selection
• presetctrl0
  Peripheral Reset Control 0
• presetctrl1
  Peripheral Reset Control 1
• presetctrl2
  Peripheral Reset Control 2
• presetctrl3
  Peripheral Reset Control 3
• presetctrlclr
  Peripheral Reset Control Clear
• presetctrlset
  Peripheral Reset Control Set
• pwmsubctl
  PWM%s Submodule Control
• ram_interleave
  Control PKC RAM Interleave Access
• ref_clk_ctrl
  FRO 48MHz Reference Clock Control
• ref_clk_ctrl_clr
  FRO 48MHz Reference Clock Control Clear
• ref_clk_ctrl_set
  FRO 48MHz Reference Clock Control Set
• romcr
  ROM Wait State
• saiclkdiv
  SAI%s Function Clock Division
• saiclksel
  SAI%s Function Clock Source Select
• sctclkdiv
  SCT/PWM Clock Divider
• sctclksel
  SCTimer/PWM Clock Source Select
• sincfiltclksel
  SINC FILTER Function Clock Source Select
• slowclkdiv
  SLOW_CLK Clock Divider
• smart_dmaint
  SmartDMA Interrupt Hijack
• swd_access_cpu0
  CPU0 Software Debug Access
• swd_access_cpu1
  CPU1 Software Debug Access
• swd_access_dsp
  DSP Software Debug Access
• systickclkdiv
  CPU%s System Tick Timer Divider
• systickclksel
  CPU%s System Tick Timer Source Select
• traceclkdiv
  TRACE Clock Divider
• traceclksel
  Trace Clock Source Select
• tsiclkdiv
  TSI Function Clock Divider
• tsiclksel
  TSI Function Clock Source Select
• u_sdhcclkdiv
  uSDHC Function Clock Divider
• u_sdhcclksel
  uSDHC Clock Selection
• usb0clkdiv
  USB-FS Clock Divider
• usb0clksel
  USB-FS Clock Source Select
• utickclkdiv
  UTICK Clock Divider
• utickclksel
  UTICK Function Clock Source Select
• wdt0clkdiv
  WDT0 Clock Divider
• wdt1clkdiv
  WDT1 Function Clock Divider
• wdt1clksel
  WDT1 Clock Selection

Structs

• RegisterBlock
  Register block

Type Aliases

• ADC0CLKDIV
  ADC0CLKDIV (rw) register accessor: ADC0 Clock Divider
• ADC0CLKSEL
  ADC0CLKSEL (rw) register accessor: ADC0 Clock Source Select
• ADC1CLKDIV
  ADC1CLKDIV (rw) register accessor: ADC1 Clock Divider
• ADC1CLKSEL
  ADC1CLKSEL (rw) register accessor: ADC1 Clock Source Select
• AHBCLKCTRL0
  AHBCLKCTRL0 (rw) register accessor: AHB Clock Control 0
• AHBCLKCTRL1
  AHBCLKCTRL1 (rw) register accessor: AHB Clock Control 1
• AHBCLKCTRL2
  AHBCLKCTRL2 (rw) register accessor: AHB Clock Control 2
• AHBCLKCTRL3
  AHBCLKCTRL3 (rw) register accessor: AHB Clock Control 3
• AHBCLKCTRLCLR
  AHBCLKCTRLCLR (w) register accessor: AHB Clock Control Clear
• AHBCLKCTRLSET
  AHBCLKCTRLSET (w) register accessor: AHB Clock Control Set
• AHBCLKDIV
  AHBCLKDIV (rw) register accessor: System Clock Divider
• AHBMATPRIO
  AHBMATPRIO (rw) register accessor: AHB Matrix Priority Control
• AUTOCLKGATEOVERRIDE
  AUTOCLKGATEOVERRIDE (rw) register accessor: Control Automatic Clock Gating
• AUTOCLKGATEOVERRIDEC
  AUTOCLKGATEOVERRIDEC (rw) register accessor: Control Automatic Clock Gating C
• BINARY_CODE_LSB
  BINARY_CODE_LSB (r) register accessor: Gray to Binary Converter Binary Code [31:0]
• BINARY_CODE_MSB
  BINARY_CODE_MSB (r) register accessor: Gray to Binary Converter Binary Code [41:32]
• CLKOUTDIV
  CLKOUTDIV (rw) register accessor: CLKOUT Clock Divider
• CLKOUTSEL
  CLKOUTSEL (rw) register accessor: CLKOUT Clock Source Select
• CLKOUT_FRGCTRL
  CLKOUT_FRGCTRL (rw) register accessor: CLKOUT FRG Control
• CLKUNLOCK
  CLKUNLOCK (rw) register accessor: Clock Configuration Unlock
• CLOCK_CTRL
  CLOCK_CTRL (rw) register accessor: Clock Control
• CPBOOT
  CPBOOT (rw) register accessor: Coprocessor Boot Address
• CPU0NSTCKCAL
  CPU0NSTCKCAL (rw) register accessor: Non-Secure CPU0 System Tick Calibration
• CPU0STCKCAL
  CPU0STCKCAL (rw) register accessor: Secure CPU0 System Tick Calibration
• CPU1STCKCAL
  CPU1STCKCAL (rw) register accessor: System tick calibration for CPU1
• CPUCTRL
  CPUCTRL (rw) register accessor: CPU Control for Multiple Processors
• CPUSTAT
  CPUSTAT (r) register accessor: CPU Status
• CTIMERCLKDIV
  CTIMERCLKDIV (rw) register accessor: CTimer Clock Divider
• CTIMERCLKSEL
  CTIMERCLKSEL (rw) register accessor: CTIMER Clock Source Select
• CTIMERGLOBALSTARTEN
  CTIMERGLOBALSTARTEN (rw) register accessor: CTIMER Global Start Enable
• DAC0CLKDIV
  DAC0CLKDIV (rw) register accessor: DAC0 functional clock divider
• DAC0CLKSEL
  DAC0CLKSEL (rw) register accessor: DAC0 Functional Clock Selection
• DAC1CLKDIV
  DAC1CLKDIV (rw) register accessor: DAC1 functional clock divider
• DAC1CLKSEL
  DAC1CLKSEL (rw) register accessor: DAC1 Functional Clock Selection
• DAC2CLKDIV
  DAC2CLKDIV (rw) register accessor: DAC2 functional clock divider
• DAC2CLKSEL
  DAC2CLKSEL (rw) register accessor: DAC2 Functional Clock Selection
• DEBUG_AUTH_BEACON
  DEBUG_AUTH_BEACON (rw) register accessor: Debug Authentication BEACON
• DEBUG_FEATURES
  DEBUG_FEATURES (rw) register accessor: Cortex Debug Features Control
• DEBUG_FEATURES_DP
  DEBUG_FEATURES_DP (rw) register accessor: Cortex Debug Features Control (Duplicate)
• DEBUG_LOCK_EN
  DEBUG_LOCK_EN (rw) register accessor: Control Write Access to Security
• DEVICE_ID0
  DEVICE_ID0 (r) register accessor: Device ID
• DEVICE_TYPE
  DEVICE_TYPE (r) register accessor: Device Type
• DIEID
  DIEID (r) register accessor: Chip Revision ID and Number
• ECC_ENABLE_CTRL
  ECC_ENABLE_CTRL (rw) register accessor: RAM ECC Enable Control
• ELS_AS_BOOT_LOG0
  ELS_AS_BOOT_LOG0 (r) register accessor: Boot state captured during boot: Main ROM log
• ELS_AS_BOOT_LOG1
  ELS_AS_BOOT_LOG1 (r) register accessor: Boot state captured during boot: N-boot library log
• ELS_AS_BOOT_LOG2
  ELS_AS_BOOT_LOG2 (r) register accessor: Boot state captured during boot: Hardware status signals log
• ELS_AS_BOOT_LOG3
  ELS_AS_BOOT_LOG3 (r) register accessor: Boot state captured during boot: Security log
• ELS_AS_CFG0
  ELS_AS_CFG0 (r) register accessor: ELS AS Configuration
• ELS_AS_CFG1
  ELS_AS_CFG1 (r) register accessor: ELS AS Configuration1
• ELS_AS_CFG2
  ELS_AS_CFG2 (r) register accessor: ELS AS Configuration2
• ELS_AS_CFG3
  ELS_AS_CFG3 (r) register accessor: ELS AS Configuration3
• ELS_AS_FLAG0
  ELS_AS_FLAG0 (r) register accessor: ELS AS Flag0
• ELS_AS_FLAG1
  ELS_AS_FLAG1 (r) register accessor: ELS AS Flag1
• ELS_AS_ST0
  ELS_AS_ST0 (r) register accessor: ELS AS State Register
• ELS_AS_ST1
  ELS_AS_ST1 (r) register accessor: ELS AS State1
• ELS_KDF_MASK
  ELS_KDF_MASK (rw) register accessor: Key Derivation Function Mask
• ELS_OTP_LC_STATE
  ELS_OTP_LC_STATE (r) register accessor: Life Cycle State Register
• ELS_OTP_LC_STATE_DP
  ELS_OTP_LC_STATE_DP (r) register accessor: Life Cycle State Register (Duplicate)
• ELS_TEMPORAL_STATE
  ELS_TEMPORAL_STATE (rw) register accessor: ELS Temporal State
• EMVSIMCLKDIV
  EMVSIMCLKDIV (rw) register accessor: EMVSIM%s Function Clock Division
• EMVSIMCLKSEL
  EMVSIMCLKSEL (rw) register accessor: EMVSIM%s Clock Source Select
• ENETPTPREFCLKDIV
  ENETPTPREFCLKDIV (rw) register accessor: Ethernet PTP REF Function Clock Divider
• ENETPTPREFCLKSEL
  ENETPTPREFCLKSEL (rw) register accessor: Ethernet PTP REF Clock Selection
• ENETRMIICLKDIV
  ENETRMIICLKDIV (rw) register accessor: Ethernet RMII Function Clock Divider
• ENETRMIICLKSEL
  ENETRMIICLKSEL (rw) register accessor: Ethernet RMII Clock Selection
• ENET_PHY_INTF_SEL
  ENET_PHY_INTF_SEL (rw) register accessor: Ethernet PHY Interface Select
• ENET_SBD_FLOW_CTRL
  ENET_SBD_FLOW_CTRL (rw) register accessor: Sideband Flow Control
• ETB_COUNTER_CTRL
  ETB_COUNTER_CTRL (rw) register accessor: ETB Counter Control Register
• ETB_COUNTER_RELOAD
  ETB_COUNTER_RELOAD (rw) register accessor: ETB Counter Reload Register
• ETB_COUNTER_VALUE
  ETB_COUNTER_VALUE (r) register accessor: ETB Counter Value Register
• ETB_STATUS
  ETB_STATUS (rw) register accessor: ETB Counter Status Register
• EWM0CLKSEL
  EWM0CLKSEL (rw) register accessor: EWM0 Clock Selection
• FCCLKSEL
  FCCLKSEL (rw) register accessor: LP_FLEXCOMM Clock Source Select for Fractional Rate Divider
• FLEXCAN0CLKDIV
  FLEXCAN0CLKDIV (rw) register accessor: FLEXCAN0 Function Clock Divider
• FLEXCAN0CLKSEL
  FLEXCAN0CLKSEL (rw) register accessor: FLEXCAN0 Clock Selection
• FLEXCAN1CLKDIV
  FLEXCAN1CLKDIV (rw) register accessor: FLEXCAN1 Function Clock Divider
• FLEXCAN1CLKSEL
  FLEXCAN1CLKSEL (rw) register accessor: FLEXCAN1 Clock Selection
• FLEXCOMMCLKDIV
  FLEXCOMMCLKDIV (rw) register accessor: LP_FLEXCOMM Clock Divider
• FLEXIOCLKDIV
  FLEXIOCLKDIV (rw) register accessor: FLEXIO Function Clock Divider
• FLEXIOCLKSEL
  FLEXIOCLKSEL (rw) register accessor: FLEXIO Clock Selection
• FLEX_SPICLKDIV
  FlexSPICLKDIV (rw) register accessor: FlexSPI Clock Divider
• FLEX_SPICLKSEL
  FlexSPICLKSEL (rw) register accessor: FlexSPI Clock Selection
• FROHFDIV
  FROHFDIV (rw) register accessor: FRO_HF_DIV Clock Divider
• GDET_CTRL
  GDET_CTRL (rw) register accessor: GDET Control Register
• GRAY_CODE_LSB
  GRAY_CODE_LSB (rw) register accessor: Gray to Binary Converter Gray code_gray[31:0]
• GRAY_CODE_MSB
  GRAY_CODE_MSB (rw) register accessor: Gray to Binary Converter Gray code_gray[41:32]
• I3C0FCLKDIV
  I3C0FCLKDIV (rw) register accessor: I3C0 Functional Clock FCLK Divider
• I3C0FCLKSDIV
  I3C0FCLKSDIV (rw) register accessor: I3C0 FCLK Slow Clock Divider
• I3C0FCLKSEL
  I3C0FCLKSEL (rw) register accessor: I3C0 Functional Clock Selection
• I3C0FCLKSSEL
  I3C0FCLKSSEL (rw) register accessor: I3C0 FCLK Slow Selection
• I3C0FCLKSTCDIV
  I3C0FCLKSTCDIV (rw) register accessor: I3C0 FCLK_STC Clock Divider
• I3C0FCLKSTCSEL
  I3C0FCLKSTCSEL (rw) register accessor: I3C0 FCLK_STC Clock Selection
• I3C1FCLKDIV
  I3C1FCLKDIV (rw) register accessor: I3C1 Functional Clock FCLK Divider
• I3C1FCLKSDIV
  I3C1FCLKSDIV (rw) register accessor: I3C1 FCLK Slow clock Divider
• I3C1FCLKSEL
  I3C1FCLKSEL (rw) register accessor: I3C1 Functional Clock Selection
• I3C1FCLKSSEL
  I3C1FCLKSSEL (rw) register accessor: I3C1 FCLK Slow Selection
• I3C1FCLKSTCDIV
  I3C1FCLKSTCDIV (rw) register accessor: I3C1 FCLK_STC Clock Divider
• I3C1FCLKSTCSEL
  I3C1FCLKSTCSEL (rw) register accessor: Selects the I3C1 Time Control clock
• JTAG_ID
  JTAG_ID (r) register accessor: JTAG Chip ID
• KEY_RETAIN_CTRL
  KEY_RETAIN_CTRL (rw) register accessor: Key Retain Control
• LPCAC_CTRL
  LPCAC_CTRL (rw) register accessor: LPCAC Control
• MICFILFCLKDIV
  MICFILFCLKDIV (rw) register accessor: MICFIL Clock Division
• MICFILFCLKSEL
  MICFILFCLKSEL (rw) register accessor: MICFIL Clock Selection
• NMISRC
  NMISRC (rw) register accessor: NMI Source Select
• NVM_CTRL
  NVM_CTRL (rw) register accessor: NVM Control
• OSTIMERCLKSEL
  OSTIMERCLKSEL (rw) register accessor: OSTIMER Clock Selection
• PLL1CLKDIV
  PLL1CLKDIV (rw) register accessor: PLL1 Clock %s Divider
• PLLCLKDIV
  PLLCLKDIV (rw) register accessor: PLL Clock Divider
• PLLCLKDIVSEL
  PLLCLKDIVSEL (rw) register accessor: PLL Clock Divider Clock Selection
• PRESETCTRL0
  PRESETCTRL0 (rw) register accessor: Peripheral Reset Control 0
• PRESETCTRL1
  PRESETCTRL1 (rw) register accessor: Peripheral Reset Control 1
• PRESETCTRL2
  PRESETCTRL2 (rw) register accessor: Peripheral Reset Control 2
• PRESETCTRL3
  PRESETCTRL3 (rw) register accessor: Peripheral Reset Control 3
• PRESETCTRLCLR
  PRESETCTRLCLR (w) register accessor: Peripheral Reset Control Clear
• PRESETCTRLSET
  PRESETCTRLSET (w) register accessor: Peripheral Reset Control Set
• PWMSUBCTL
  PWMSUBCTL (rw) register accessor: PWM%s Submodule Control
• RAM_INTERLEAVE
  RAM_INTERLEAVE (rw) register accessor: Control PKC RAM Interleave Access
• REF_CLK_CTRL
  REF_CLK_CTRL (rw) register accessor: FRO 48MHz Reference Clock Control
• REF_CLK_CTRL_CLR
  REF_CLK_CTRL_CLR (w) register accessor: FRO 48MHz Reference Clock Control Clear
• REF_CLK_CTRL_SET
  REF_CLK_CTRL_SET (w) register accessor: FRO 48MHz Reference Clock Control Set
• ROMCR
  ROMCR (rw) register accessor: ROM Wait State
• SAICLKDIV
  SAICLKDIV (rw) register accessor: SAI%s Function Clock Division
• SAICLKSEL
  SAICLKSEL (rw) register accessor: SAI%s Function Clock Source Select
• SCTCLKDIV
  SCTCLKDIV (rw) register accessor: SCT/PWM Clock Divider
• SCTCLKSEL
  SCTCLKSEL (rw) register accessor: SCTimer/PWM Clock Source Select
• SINCFILTCLKSEL
  SINCFILTCLKSEL (rw) register accessor: SINC FILTER Function Clock Source Select
• SLOWCLKDIV
  SLOWCLKDIV (rw) register accessor: SLOW_CLK Clock Divider
• SMART_DMAINT
  SmartDMAINT (rw) register accessor: SmartDMA Interrupt Hijack
• SWD_ACCESS_CPU0
  SWD_ACCESS_CPU0 (rw) register accessor: CPU0 Software Debug Access
• SWD_ACCESS_CPU1
  SWD_ACCESS_CPU1 (w) register accessor: CPU1 Software Debug Access
• SWD_ACCESS_DSP
  SWD_ACCESS_DSP (rw) register accessor: DSP Software Debug Access
• SYSTICKCLKDIV
  SYSTICKCLKDIV (rw) register accessor: CPU%s System Tick Timer Divider
• SYSTICKCLKSEL
  SYSTICKCLKSEL (rw) register accessor: CPU%s System Tick Timer Source Select
• TRACECLKDIV
  TRACECLKDIV (rw) register accessor: TRACE Clock Divider
• TRACECLKSEL
  TRACECLKSEL (rw) register accessor: Trace Clock Source Select
• TSICLKDIV
  TSICLKDIV (rw) register accessor: TSI Function Clock Divider
• TSICLKSEL
  TSICLKSEL (rw) register accessor: TSI Function Clock Source Select
• USB0CLKDIV
  USB0CLKDIV (rw) register accessor: USB-FS Clock Divider
• USB0CLKSEL
  USB0CLKSEL (rw) register accessor: USB-FS Clock Source Select
• UTICKCLKDIV
  UTICKCLKDIV (rw) register accessor: UTICK Clock Divider
• UTICKCLKSEL
  UTICKCLKSEL (rw) register accessor: UTICK Function Clock Source Select
• U_SDHCCLKDIV
  uSDHCCLKDIV (rw) register accessor: uSDHC Function Clock Divider
• U_SDHCCLKSEL
  uSDHCCLKSEL (rw) register accessor: uSDHC Clock Selection
• WDT0CLKDIV
  WDT0CLKDIV (rw) register accessor: WDT0 Clock Divider
• WDT1CLKDIV
  WDT1CLKDIV (rw) register accessor: WDT1 Function Clock Divider
• WDT1CLKSEL
  WDT1CLKSEL (rw) register accessor: WDT1 Clock Selection