Module mcxn947_pac::lpuart0

LPUART

Modules

• baud
  Baud Rate
• ctrl
  Control
• data
  Data
• dataro
  Data Read-Only
• fifo
  FIFO
• global
  Global
• hdcr
  Half Duplex Control
• match_
  Match Address
• mcr
  MODEM Control
• modir
  MODEM IrDA
• msr
  MODEM Status
• param
  Parameter
• pincfg
  Pin Configuration
• reir
  Receiver Extended Idle
• stat
  Status
• tcbr
  Transmit Command Burst
• tdbr
  Transmit Data Burst
• teir
  Transmitter Extended Idle
• timeout
  Timeout N
• tocr
  Timeout Control
• tosr
  Timeout Status
• verid
  Version ID
• water
  Watermark

Structs

• RegisterBlock
  Register block

Type Aliases

• BAUD
  BAUD (rw) register accessor: Baud Rate
• CTRL
  CTRL (rw) register accessor: Control
• DATA
  DATA (rw) register accessor: Data
• DATARO
  DATARO (r) register accessor: Data Read-Only
• FIFO
  FIFO (rw) register accessor: FIFO
• GLOBAL
  GLOBAL (rw) register accessor: Global
• HDCR
  HDCR (rw) register accessor: Half Duplex Control
• MATCH
  MATCH (rw) register accessor: Match Address
• MCR
  MCR (rw) register accessor: MODEM Control
• MODIR
  MODIR (rw) register accessor: MODEM IrDA
• MSR
  MSR (rw) register accessor: MODEM Status
• PARAM
  PARAM (r) register accessor: Parameter
• PINCFG
  PINCFG (rw) register accessor: Pin Configuration
• REIR
  REIR (rw) register accessor: Receiver Extended Idle
• STAT
  STAT (rw) register accessor: Status
• TCBR
  TCBR (w) register accessor: Transmit Command Burst
• TDBR
  TDBR (w) register accessor: Transmit Data Burst
• TEIR
  TEIR (rw) register accessor: Transmitter Extended Idle
• TIMEOUT
  TIMEOUT (rw) register accessor: Timeout N
• TOCR
  TOCR (rw) register accessor: Timeout Control
• TOSR
  TOSR (rw) register accessor: Timeout Status
• VERID
  VERID (r) register accessor: Version ID
• WATER
  WATER (rw) register accessor: Watermark