Module mcxn947_pac::syscon0
source · Expand description
SYSCON
Re-exports§
pub use self::cmp::CMP;
Modules§
- ADC0 Clock Divider
- ADC0 Clock Source Select
- ADC1 Clock Divider
- ADC1 Clock Source Select
- AHB Clock Control 0
- AHB Clock Control 1
- AHB Clock Control 2
- AHB Clock Control 3
- AHB Clock Control Clear
- AHB Clock Control Set
- System Clock Divider
- AHB Matrix Priority Control
- Control Automatic Clock Gating
- Control Automatic Clock Gating C
- Gray to Binary Converter Binary Code [31:0]
- Gray to Binary Converter Binary Code [41:32]
- CLKOUT FRG Control
- CLKOUT Clock Divider
- CLKOUT Clock Source Select
- Clock Configuration Unlock
- Clock Control
- Cluster Cluster CMP%s, containing CMP?FCLKSEL, CMP?FCLKDIV, CMP?RRCLKSEL, CMP?RRCLKDIV
- Coprocessor Boot Address
- Non-Secure CPU0 System Tick Calibration
- Secure CPU0 System Tick Calibration
- System tick calibration for CPU1
- CPU Control for Multiple Processors
- CPU Status
- CTimer Clock Divider
- CTIMER Clock Source Select
- CTIMER Global Start Enable
- DAC0 functional clock divider
- DAC0 Functional Clock Selection
- DAC1 functional clock divider
- DAC1 Functional Clock Selection
- DAC2 functional clock divider
- DAC2 Functional Clock Selection
- Debug Authentication BEACON
- Cortex Debug Features Control
- Cortex Debug Features Control (Duplicate)
- Control Write Access to Security
- Device ID
- Device Type
- Chip Revision ID and Number
- RAM ECC Enable Control
- Boot state captured during boot: Main ROM log
- Boot state captured during boot: N-boot library log
- Boot state captured during boot: Hardware status signals log
- Boot state captured during boot: Security log
- ELS AS Configuration
- ELS AS Configuration1
- ELS AS Configuration2
- ELS AS Configuration3
- ELS AS Flag0
- ELS AS Flag1
- ELS AS State Register
- ELS AS State1
- Key Derivation Function Mask
- Life Cycle State Register
- Life Cycle State Register (Duplicate)
- ELS Temporal State
- EMVSIM%s Function Clock Division
- EMVSIM%s Clock Source Select
- Ethernet PHY Interface Select
- Sideband Flow Control
- Ethernet PTP REF Function Clock Divider
- Ethernet PTP REF Clock Selection
- Ethernet RMII Function Clock Divider
- Ethernet RMII Clock Selection
- ETB Counter Control Register
- ETB Counter Reload Register
- ETB Counter Value Register
- ETB Counter Status Register
- EWM0 Clock Selection
- LP_FLEXCOMM Clock Source Select for Fractional Rate Divider
- FlexSPI Clock Divider
- FlexSPI Clock Selection
- FLEXCAN0 Function Clock Divider
- FLEXCAN0 Clock Selection
- FLEXCAN1 Function Clock Divider
- FLEXCAN1 Clock Selection
- LP_FLEXCOMM Clock Divider
- FLEXIO Function Clock Divider
- FLEXIO Clock Selection
- FRO_HF_DIV Clock Divider
- GDET Control Register
- Gray to Binary Converter Gray code_gray[31:0]
- Gray to Binary Converter Gray code_gray[41:32]
- I3C0 Functional Clock FCLK Divider
- I3C0 FCLK Slow Clock Divider
- I3C0 Functional Clock Selection
- I3C0 FCLK Slow Selection
- I3C0 FCLK_STC Clock Divider
- I3C0 FCLK_STC Clock Selection
- I3C1 Functional Clock FCLK Divider
- I3C1 FCLK Slow clock Divider
- I3C1 Functional Clock Selection
- I3C1 FCLK Slow Selection
- I3C1 FCLK_STC Clock Divider
- Selects the I3C1 Time Control clock
- JTAG Chip ID
- Key Retain Control
- LPCAC Control
- MICFIL Clock Division
- MICFIL Clock Selection
- NMI Source Select
- NVM Control
- OSTIMER Clock Selection
- PLL1 Clock %s Divider
- PLL Clock Divider
- PLL Clock Divider Clock Selection
- Peripheral Reset Control 0
- Peripheral Reset Control 1
- Peripheral Reset Control 2
- Peripheral Reset Control 3
- Peripheral Reset Control Clear
- Peripheral Reset Control Set
- PWM%s Submodule Control
- Control PKC RAM Interleave Access
- FRO 48MHz Reference Clock Control
- FRO 48MHz Reference Clock Control Clear
- FRO 48MHz Reference Clock Control Set
- ROM Wait State
- SAI%s Function Clock Division
- SAI%s Function Clock Source Select
- SCT/PWM Clock Divider
- SCTimer/PWM Clock Source Select
- SINC FILTER Function Clock Source Select
- SLOW_CLK Clock Divider
- SmartDMA Interrupt Hijack
- CPU0 Software Debug Access
- CPU1 Software Debug Access
- DSP Software Debug Access
- CPU%s System Tick Timer Divider
- CPU%s System Tick Timer Source Select
- TRACE Clock Divider
- Trace Clock Source Select
- TSI Function Clock Divider
- TSI Function Clock Source Select
- uSDHC Function Clock Divider
- uSDHC Clock Selection
- USB-FS Clock Divider
- USB-FS Clock Source Select
- UTICK Clock Divider
- UTICK Function Clock Source Select
- WDT0 Clock Divider
- WDT1 Function Clock Divider
- WDT1 Clock Selection
Structs§
- Register block
Type Aliases§
- ADC0CLKDIV (rw) register accessor: ADC0 Clock Divider
- ADC0CLKSEL (rw) register accessor: ADC0 Clock Source Select
- ADC1CLKDIV (rw) register accessor: ADC1 Clock Divider
- ADC1CLKSEL (rw) register accessor: ADC1 Clock Source Select
- AHBCLKCTRL0 (rw) register accessor: AHB Clock Control 0
- AHBCLKCTRL1 (rw) register accessor: AHB Clock Control 1
- AHBCLKCTRL2 (rw) register accessor: AHB Clock Control 2
- AHBCLKCTRL3 (rw) register accessor: AHB Clock Control 3
- AHBCLKCTRLCLR (w) register accessor: AHB Clock Control Clear
- AHBCLKCTRLSET (w) register accessor: AHB Clock Control Set
- AHBCLKDIV (rw) register accessor: System Clock Divider
- AHBMATPRIO (rw) register accessor: AHB Matrix Priority Control
- AUTOCLKGATEOVERRIDE (rw) register accessor: Control Automatic Clock Gating
- AUTOCLKGATEOVERRIDEC (rw) register accessor: Control Automatic Clock Gating C
- BINARY_CODE_LSB (r) register accessor: Gray to Binary Converter Binary Code [31:0]
- BINARY_CODE_MSB (r) register accessor: Gray to Binary Converter Binary Code [41:32]
- CLKOUTDIV (rw) register accessor: CLKOUT Clock Divider
- CLKOUTSEL (rw) register accessor: CLKOUT Clock Source Select
- CLKOUT_FRGCTRL (rw) register accessor: CLKOUT FRG Control
- CLKUNLOCK (rw) register accessor: Clock Configuration Unlock
- CLOCK_CTRL (rw) register accessor: Clock Control
- CPBOOT (rw) register accessor: Coprocessor Boot Address
- CPU0NSTCKCAL (rw) register accessor: Non-Secure CPU0 System Tick Calibration
- CPU0STCKCAL (rw) register accessor: Secure CPU0 System Tick Calibration
- CPU1STCKCAL (rw) register accessor: System tick calibration for CPU1
- CPUCTRL (rw) register accessor: CPU Control for Multiple Processors
- CPUSTAT (r) register accessor: CPU Status
- CTIMERCLKDIV (rw) register accessor: CTimer Clock Divider
- CTIMERCLKSEL (rw) register accessor: CTIMER Clock Source Select
- CTIMERGLOBALSTARTEN (rw) register accessor: CTIMER Global Start Enable
- DAC0CLKDIV (rw) register accessor: DAC0 functional clock divider
- DAC0CLKSEL (rw) register accessor: DAC0 Functional Clock Selection
- DAC1CLKDIV (rw) register accessor: DAC1 functional clock divider
- DAC1CLKSEL (rw) register accessor: DAC1 Functional Clock Selection
- DAC2CLKDIV (rw) register accessor: DAC2 functional clock divider
- DAC2CLKSEL (rw) register accessor: DAC2 Functional Clock Selection
- DEBUG_AUTH_BEACON (rw) register accessor: Debug Authentication BEACON
- DEBUG_FEATURES (rw) register accessor: Cortex Debug Features Control
- DEBUG_FEATURES_DP (rw) register accessor: Cortex Debug Features Control (Duplicate)
- DEBUG_LOCK_EN (rw) register accessor: Control Write Access to Security
- DEVICE_ID0 (r) register accessor: Device ID
- DEVICE_TYPE (r) register accessor: Device Type
- DIEID (r) register accessor: Chip Revision ID and Number
- ECC_ENABLE_CTRL (rw) register accessor: RAM ECC Enable Control
- ELS_AS_BOOT_LOG0 (r) register accessor: Boot state captured during boot: Main ROM log
- ELS_AS_BOOT_LOG1 (r) register accessor: Boot state captured during boot: N-boot library log
- ELS_AS_BOOT_LOG2 (r) register accessor: Boot state captured during boot: Hardware status signals log
- ELS_AS_BOOT_LOG3 (r) register accessor: Boot state captured during boot: Security log
- ELS_AS_CFG0 (r) register accessor: ELS AS Configuration
- ELS_AS_CFG1 (r) register accessor: ELS AS Configuration1
- ELS_AS_CFG2 (r) register accessor: ELS AS Configuration2
- ELS_AS_CFG3 (r) register accessor: ELS AS Configuration3
- ELS_AS_FLAG0 (r) register accessor: ELS AS Flag0
- ELS_AS_FLAG1 (r) register accessor: ELS AS Flag1
- ELS_AS_ST0 (r) register accessor: ELS AS State Register
- ELS_AS_ST1 (r) register accessor: ELS AS State1
- ELS_KDF_MASK (rw) register accessor: Key Derivation Function Mask
- ELS_OTP_LC_STATE (r) register accessor: Life Cycle State Register
- ELS_OTP_LC_STATE_DP (r) register accessor: Life Cycle State Register (Duplicate)
- ELS_TEMPORAL_STATE (rw) register accessor: ELS Temporal State
- EMVSIMCLKDIV (rw) register accessor: EMVSIM%s Function Clock Division
- EMVSIMCLKSEL (rw) register accessor: EMVSIM%s Clock Source Select
- ENETPTPREFCLKDIV (rw) register accessor: Ethernet PTP REF Function Clock Divider
- ENETPTPREFCLKSEL (rw) register accessor: Ethernet PTP REF Clock Selection
- ENETRMIICLKDIV (rw) register accessor: Ethernet RMII Function Clock Divider
- ENETRMIICLKSEL (rw) register accessor: Ethernet RMII Clock Selection
- ENET_PHY_INTF_SEL (rw) register accessor: Ethernet PHY Interface Select
- ENET_SBD_FLOW_CTRL (rw) register accessor: Sideband Flow Control
- ETB_COUNTER_CTRL (rw) register accessor: ETB Counter Control Register
- ETB_COUNTER_RELOAD (rw) register accessor: ETB Counter Reload Register
- ETB_COUNTER_VALUE (r) register accessor: ETB Counter Value Register
- ETB_STATUS (rw) register accessor: ETB Counter Status Register
- EWM0CLKSEL (rw) register accessor: EWM0 Clock Selection
- FCCLKSEL (rw) register accessor: LP_FLEXCOMM Clock Source Select for Fractional Rate Divider
- FLEXCAN0CLKDIV (rw) register accessor: FLEXCAN0 Function Clock Divider
- FLEXCAN0CLKSEL (rw) register accessor: FLEXCAN0 Clock Selection
- FLEXCAN1CLKDIV (rw) register accessor: FLEXCAN1 Function Clock Divider
- FLEXCAN1CLKSEL (rw) register accessor: FLEXCAN1 Clock Selection
- FLEXCOMMCLKDIV (rw) register accessor: LP_FLEXCOMM Clock Divider
- FLEXIOCLKDIV (rw) register accessor: FLEXIO Function Clock Divider
- FLEXIOCLKSEL (rw) register accessor: FLEXIO Clock Selection
- FlexSPICLKDIV (rw) register accessor: FlexSPI Clock Divider
- FlexSPICLKSEL (rw) register accessor: FlexSPI Clock Selection
- FROHFDIV (rw) register accessor: FRO_HF_DIV Clock Divider
- GDET_CTRL (rw) register accessor: GDET Control Register
- GRAY_CODE_LSB (rw) register accessor: Gray to Binary Converter Gray code_gray[31:0]
- GRAY_CODE_MSB (rw) register accessor: Gray to Binary Converter Gray code_gray[41:32]
- I3C0FCLKDIV (rw) register accessor: I3C0 Functional Clock FCLK Divider
- I3C0FCLKSDIV (rw) register accessor: I3C0 FCLK Slow Clock Divider
- I3C0FCLKSEL (rw) register accessor: I3C0 Functional Clock Selection
- I3C0FCLKSSEL (rw) register accessor: I3C0 FCLK Slow Selection
- I3C0FCLKSTCDIV (rw) register accessor: I3C0 FCLK_STC Clock Divider
- I3C0FCLKSTCSEL (rw) register accessor: I3C0 FCLK_STC Clock Selection
- I3C1FCLKDIV (rw) register accessor: I3C1 Functional Clock FCLK Divider
- I3C1FCLKSDIV (rw) register accessor: I3C1 FCLK Slow clock Divider
- I3C1FCLKSEL (rw) register accessor: I3C1 Functional Clock Selection
- I3C1FCLKSSEL (rw) register accessor: I3C1 FCLK Slow Selection
- I3C1FCLKSTCDIV (rw) register accessor: I3C1 FCLK_STC Clock Divider
- I3C1FCLKSTCSEL (rw) register accessor: Selects the I3C1 Time Control clock
- JTAG_ID (r) register accessor: JTAG Chip ID
- KEY_RETAIN_CTRL (rw) register accessor: Key Retain Control
- LPCAC_CTRL (rw) register accessor: LPCAC Control
- MICFILFCLKDIV (rw) register accessor: MICFIL Clock Division
- MICFILFCLKSEL (rw) register accessor: MICFIL Clock Selection
- NMISRC (rw) register accessor: NMI Source Select
- NVM_CTRL (rw) register accessor: NVM Control
- OSTIMERCLKSEL (rw) register accessor: OSTIMER Clock Selection
- PLL1CLKDIV (rw) register accessor: PLL1 Clock %s Divider
- PLLCLKDIV (rw) register accessor: PLL Clock Divider
- PLLCLKDIVSEL (rw) register accessor: PLL Clock Divider Clock Selection
- PRESETCTRL0 (rw) register accessor: Peripheral Reset Control 0
- PRESETCTRL1 (rw) register accessor: Peripheral Reset Control 1
- PRESETCTRL2 (rw) register accessor: Peripheral Reset Control 2
- PRESETCTRL3 (rw) register accessor: Peripheral Reset Control 3
- PRESETCTRLCLR (w) register accessor: Peripheral Reset Control Clear
- PRESETCTRLSET (w) register accessor: Peripheral Reset Control Set
- PWMSUBCTL (rw) register accessor: PWM%s Submodule Control
- RAM_INTERLEAVE (rw) register accessor: Control PKC RAM Interleave Access
- REF_CLK_CTRL (rw) register accessor: FRO 48MHz Reference Clock Control
- REF_CLK_CTRL_CLR (w) register accessor: FRO 48MHz Reference Clock Control Clear
- REF_CLK_CTRL_SET (w) register accessor: FRO 48MHz Reference Clock Control Set
- ROMCR (rw) register accessor: ROM Wait State
- SAICLKDIV (rw) register accessor: SAI%s Function Clock Division
- SAICLKSEL (rw) register accessor: SAI%s Function Clock Source Select
- SCTCLKDIV (rw) register accessor: SCT/PWM Clock Divider
- SCTCLKSEL (rw) register accessor: SCTimer/PWM Clock Source Select
- SINCFILTCLKSEL (rw) register accessor: SINC FILTER Function Clock Source Select
- SLOWCLKDIV (rw) register accessor: SLOW_CLK Clock Divider
- SmartDMAINT (rw) register accessor: SmartDMA Interrupt Hijack
- SWD_ACCESS_CPU0 (rw) register accessor: CPU0 Software Debug Access
- SWD_ACCESS_CPU1 (w) register accessor: CPU1 Software Debug Access
- SWD_ACCESS_DSP (rw) register accessor: DSP Software Debug Access
- SYSTICKCLKDIV (rw) register accessor: CPU%s System Tick Timer Divider
- SYSTICKCLKSEL (rw) register accessor: CPU%s System Tick Timer Source Select
- TRACECLKDIV (rw) register accessor: TRACE Clock Divider
- TRACECLKSEL (rw) register accessor: Trace Clock Source Select
- TSICLKDIV (rw) register accessor: TSI Function Clock Divider
- TSICLKSEL (rw) register accessor: TSI Function Clock Source Select
- USB0CLKDIV (rw) register accessor: USB-FS Clock Divider
- USB0CLKSEL (rw) register accessor: USB-FS Clock Source Select
- UTICKCLKDIV (rw) register accessor: UTICK Clock Divider
- UTICKCLKSEL (rw) register accessor: UTICK Function Clock Source Select
- uSDHCCLKDIV (rw) register accessor: uSDHC Function Clock Divider
- uSDHCCLKSEL (rw) register accessor: uSDHC Clock Selection
- WDT0CLKDIV (rw) register accessor: WDT0 Clock Divider
- WDT1CLKDIV (rw) register accessor: WDT1 Function Clock Divider
- WDT1CLKSEL (rw) register accessor: WDT1 Clock Selection