Module mcxn947_pac::enet0

ENET

Re-exports

• pub use self::queue::QUEUE;
• pub use self::dma_ch::DMA_CH;

Modules

• dma_ch
  Cluster Cluster DMA_CH%s, containing DMA_CH?_CONTROL, DMA_CH?_TX_CONTROL, DMA_CH?_RX_CONTROL, DMA_CH?_TXDESC_LIST_ADDRESS, DMA_CH?_RXDESC_LIST_ADDRESS, DMA_CH?_TXDESC_TAIL_POINTER, DMA_CH?_RXDESC_TAIL_POINTER, DMA_CH?_TXDESC_RING_LENGTH, DMA_CH?_RX_CONTROL2, DMA_CH?_INTERRUPT_ENABLE, DMA_CH?_RX_INTERRUPT_WATCHDOG_TIMER, DMA_CH?_SLOT_FUNCTION_CONTROL_STATUS, DMA_CH?_CURRENT_APP_TXDESC, DMA_CH?_CURRENT_APP_RXDESC, DMA_CH?_CURRENT_APP_TXBUFFER, DMA_CH?_CURRENT_APP_RXBUFFER, DMA_CH?_STATUS, DMA_CH?_MISS_FRAME_CNT, DMA_CH?_RX_ERI_CNT
• dma_debug_status0
  DMA Debug Status 0
• dma_interrupt_status
  DMA Interrupt Status
• dma_mode
  DMA Bus Mode
• dma_sysbus_mode
  DMA System Bus Mode
• indir_access_ctrl
  Indirect Access Control
• indir_access_data
  Indirect Access Data
• mac_address0_high
  MAC Address0 High
• mac_address0_low
  MAC Address0 Low
• mac_configuration
  MAC Configuration
• mac_csr_sw_ctrl
  CSR Software Control
• mac_debug
  MAC Debug
• mac_ext_configuration
  MAC Extended Configuration Register
• mac_hw_feature0
  Hardware Features 0
• mac_hw_feature1
  Hardware Features 1
• mac_hw_feature2
  Hardware Features 2
• mac_hw_feature3
  Hardware Features 3
• mac_inner_vlan_incl
  MAC Inner VLAN Tag Inclusion or Replacement
• mac_interrupt_enable
  Interrupt Enable
• mac_interrupt_status
  Interrupt Status
• mac_lpi_control_status
  LPI Control and Status
• mac_lpi_entry_timer
  Tx LPI Entry Timer Control
• mac_lpi_timers_control
  LPI Timers Control
• mac_mdio_address
  MDIO Address
• mac_mdio_data
  MAC MDIO Data
• mac_oneus_tic_counter
  One-microsecond Reference Timer
• mac_packet_filter
  MAC Packet Filter
• mac_pmt_control_status
  PMT Control and Status
• mac_pps_control
  PPS Control
• mac_q0_tx_flow_ctrl
  MAC Q0 Tx Flow Control
• mac_rwk_packet_filter
  Remote Wakeup Filter
• mac_rx_flow_ctrl
  MAC Rx Flow Control
• mac_rx_tx_status
  Receive Transmit Status
• mac_rxq_ctrl0
  Receive Queue Control 0
• mac_rxq_ctrl1
  Receive Queue Control 1
• mac_rxq_ctrl2
  Receive Queue Control 2
• mac_rxq_ctrl4
  Receive Queue Control 4
• mac_sub_second_increment
  Subsecond Increment
• mac_system_time_nanoseconds
  System Time Nanoseconds
• mac_system_time_nanoseconds_update
  System Time Nanoseconds Update
• mac_system_time_seconds
  System Time Seconds
• mac_system_time_seconds_update
  System Time Seconds Update
• mac_timestamp_addend
  Timestamp Addend
• mac_timestamp_control
  Timestamp Control
• mac_timestamp_egress_corr_nanosecond
  Timestamp Egress Correction Nanosecond
• mac_timestamp_egress_latency
  Timestamp Egress Latency
• mac_timestamp_ingress_corr_nanosecond
  Timestamp Ingress Correction Nanosecond
• mac_timestamp_ingress_latency
  Timestamp Ingress Latency
• mac_timestamp_status
  Timestamp Status
• mac_tx_timestamp_status_nanoseconds
  Transmit Timestamp Status Nanoseconds
• mac_tx_timestamp_status_seconds
  Transmit Timestamp Status Seconds
• mac_version
  MAC Version
• mac_vlan_incl
  VLAN Tag Inclusion or Replacement
• mac_vlan_tag_ctrl
  MAC VLAN Tag Control
• mac_watchdog_timeout
  Watchdog Timeout
• mtl_interrupt_status
  MTL Interrupt Status
• mtl_operation_mode
  MTL Operation Mode
• mtl_rxq_dma_map0
  Receive Queue and DMA Channel Mapping 0
• mtl_txq1_ets_control
  Queue 1 ETS Control
• mtl_txq1_hicredit
  Queue 1 hiCredit
• mtl_txq1_locredit
  Queue 1 loCredit
• mtl_txq1_sendslopecredit
  Queue 1 sendSlopeCredit
• pps0_target_time_nanoseconds
  PPS0 Target Time Nanoseconds
• pps0_target_time_seconds
  PPS0 Target Time Seconds
• queue
  Cluster Cluster QUEUE%s, containing MTL_TXQ?_OPERATION_MODE, MTL_TXQ?_UNDERFLOW, MTL_TXQ?_DEBUG, MTL_TXQ?_ETS_STATUS, MTL_TXQ?_QUANTUM_WEIGHT, MTL_Q?_INTERRUPT_CONTROL_STATUS, MTL_RXQ?_OPERATION_MODE, MTL_RXQ?_MISSED_PACKET_OVERFLOW_CNT, MTL_RXQ?_DEBUG, MTL_RXQ?_CONTROL

Structs

• RegisterBlock
  Register block

Type Aliases

• DMA_DEBUG_STATUS0
  DMA_DEBUG_STATUS0 (r) register accessor: DMA Debug Status 0
• DMA_INTERRUPT_STATUS
  DMA_INTERRUPT_STATUS (r) register accessor: DMA Interrupt Status
• DMA_MODE
  DMA_MODE (rw) register accessor: DMA Bus Mode
• DMA_SYSBUS_MODE
  DMA_SYSBUS_MODE (rw) register accessor: DMA System Bus Mode
• INDIR_ACCESS_CTRL
  INDIR_ACCESS_CTRL (rw) register accessor: Indirect Access Control
• INDIR_ACCESS_DATA
  INDIR_ACCESS_DATA (rw) register accessor: Indirect Access Data
• MAC_ADDRESS0_HIGH
  MAC_ADDRESS0_HIGH (rw) register accessor: MAC Address0 High
• MAC_ADDRESS0_LOW
  MAC_ADDRESS0_LOW (rw) register accessor: MAC Address0 Low
• MAC_CONFIGURATION
  MAC_CONFIGURATION (rw) register accessor: MAC Configuration
• MAC_CSR_SW_CTRL
  MAC_CSR_SW_CTRL (rw) register accessor: CSR Software Control
• MAC_DEBUG
  MAC_DEBUG (r) register accessor: MAC Debug
• MAC_EXT_CONFIGURATION
  MAC_EXT_CONFIGURATION (rw) register accessor: MAC Extended Configuration Register
• MAC_HW_FEATURE0
  MAC_HW_FEATURE0 (r) register accessor: Hardware Features 0
• MAC_HW_FEATURE1
  MAC_HW_FEATURE1 (r) register accessor: Hardware Features 1
• MAC_HW_FEATURE2
  MAC_HW_FEATURE2 (r) register accessor: Hardware Features 2
• MAC_HW_FEATURE3
  MAC_HW_FEATURE3 (r) register accessor: Hardware Features 3
• MAC_INNER_VLAN_INCL
  MAC_INNER_VLAN_INCL (rw) register accessor: MAC Inner VLAN Tag Inclusion or Replacement
• MAC_INTERRUPT_ENABLE
  MAC_INTERRUPT_ENABLE (rw) register accessor: Interrupt Enable
• MAC_INTERRUPT_STATUS
  MAC_INTERRUPT_STATUS (r) register accessor: Interrupt Status
• MAC_LPI_CONTROL_STATUS
  MAC_LPI_CONTROL_STATUS (rw) register accessor: LPI Control and Status
• MAC_LPI_ENTRY_TIMER
  MAC_LPI_ENTRY_TIMER (rw) register accessor: Tx LPI Entry Timer Control
• MAC_LPI_TIMERS_CONTROL
  MAC_LPI_TIMERS_CONTROL (rw) register accessor: LPI Timers Control
• MAC_MDIO_ADDRESS
  MAC_MDIO_ADDRESS (rw) register accessor: MDIO Address
• MAC_MDIO_DATA
  MAC_MDIO_DATA (rw) register accessor: MAC MDIO Data
• MAC_ONEUS_TIC_COUNTER
  MAC_ONEUS_TIC_COUNTER (rw) register accessor: One-microsecond Reference Timer
• MAC_PACKET_FILTER
  MAC_PACKET_FILTER (rw) register accessor: MAC Packet Filter
• MAC_PMT_CONTROL_STATUS
  MAC_PMT_CONTROL_STATUS (rw) register accessor: PMT Control and Status
• MAC_PPS_CONTROL
  MAC_PPS_CONTROL (rw) register accessor: PPS Control
• MAC_Q0_TX_FLOW_CTRL
  MAC_Q0_TX_FLOW_CTRL (rw) register accessor: MAC Q0 Tx Flow Control
• MAC_RWK_PACKET_FILTER
  MAC_RWK_PACKET_FILTER (rw) register accessor: Remote Wakeup Filter
• MAC_RXQ_CTRL0
  MAC_RXQ_CTRL0 (rw) register accessor: Receive Queue Control 0
• MAC_RXQ_CTRL1
  MAC_RXQ_CTRL1 (rw) register accessor: Receive Queue Control 1
• MAC_RXQ_CTRL2
  MAC_RXQ_CTRL2 (rw) register accessor: Receive Queue Control 2
• MAC_RXQ_CTRL4
  MAC_RXQ_CTRL4 (rw) register accessor: Receive Queue Control 4
• MAC_RX_FLOW_CTRL
  MAC_RX_FLOW_CTRL (rw) register accessor: MAC Rx Flow Control
• MAC_RX_TX_STATUS
  MAC_RX_TX_STATUS (r) register accessor: Receive Transmit Status
• MAC_SUB_SECOND_INCREMENT
  MAC_SUB_SECOND_INCREMENT (rw) register accessor: Subsecond Increment
• MAC_SYSTEM_TIME_NANOSECONDS
  MAC_SYSTEM_TIME_NANOSECONDS (r) register accessor: System Time Nanoseconds
• MAC_SYSTEM_TIME_NANOSECONDS_UPDATE
  MAC_SYSTEM_TIME_NANOSECONDS_UPDATE (rw) register accessor: System Time Nanoseconds Update
• MAC_SYSTEM_TIME_SECONDS
  MAC_SYSTEM_TIME_SECONDS (r) register accessor: System Time Seconds
• MAC_SYSTEM_TIME_SECONDS_UPDATE
  MAC_SYSTEM_TIME_SECONDS_UPDATE (rw) register accessor: System Time Seconds Update
• MAC_TIMESTAMP_ADDEND
  MAC_TIMESTAMP_ADDEND (rw) register accessor: Timestamp Addend
• MAC_TIMESTAMP_CONTROL
  MAC_TIMESTAMP_CONTROL (rw) register accessor: Timestamp Control
• MAC_TIMESTAMP_EGRESS_CORR_NANOSECOND
  MAC_TIMESTAMP_EGRESS_CORR_NANOSECOND (rw) register accessor: Timestamp Egress Correction Nanosecond
• MAC_TIMESTAMP_EGRESS_LATENCY
  MAC_TIMESTAMP_EGRESS_LATENCY (r) register accessor: Timestamp Egress Latency
• MAC_TIMESTAMP_INGRESS_CORR_NANOSECOND
  MAC_TIMESTAMP_INGRESS_CORR_NANOSECOND (rw) register accessor: Timestamp Ingress Correction Nanosecond
• MAC_TIMESTAMP_INGRESS_LATENCY
  MAC_TIMESTAMP_INGRESS_LATENCY (r) register accessor: Timestamp Ingress Latency
• MAC_TIMESTAMP_STATUS
  MAC_TIMESTAMP_STATUS (r) register accessor: Timestamp Status
• MAC_TX_TIMESTAMP_STATUS_NANOSECONDS
  MAC_TX_TIMESTAMP_STATUS_NANOSECONDS (r) register accessor: Transmit Timestamp Status Nanoseconds
• MAC_TX_TIMESTAMP_STATUS_SECONDS
  MAC_TX_TIMESTAMP_STATUS_SECONDS (r) register accessor: Transmit Timestamp Status Seconds
• MAC_VERSION
  MAC_VERSION (r) register accessor: MAC Version
• MAC_VLAN_INCL
  MAC_VLAN_INCL (rw) register accessor: VLAN Tag Inclusion or Replacement
• MAC_VLAN_TAG_CTRL
  MAC_VLAN_TAG_CTRL (rw) register accessor: MAC VLAN Tag Control
• MAC_WATCHDOG_TIMEOUT
  MAC_WATCHDOG_TIMEOUT (rw) register accessor: Watchdog Timeout
• MTL_INTERRUPT_STATUS
  MTL_INTERRUPT_STATUS (r) register accessor: MTL Interrupt Status
• MTL_OPERATION_MODE
  MTL_OPERATION_MODE (rw) register accessor: MTL Operation Mode
• MTL_RXQ_DMA_MAP0
  MTL_RXQ_DMA_MAP0 (rw) register accessor: Receive Queue and DMA Channel Mapping 0
• MTL_TXQ1_ETS_CONTROL
  MTL_TXQ1_ETS_CONTROL (rw) register accessor: Queue 1 ETS Control
• MTL_TXQ1_HICREDIT
  MTL_TXQ1_HICREDIT (rw) register accessor: Queue 1 hiCredit
• MTL_TXQ1_LOCREDIT
  MTL_TXQ1_LOCREDIT (rw) register accessor: Queue 1 loCredit
• MTL_TXQ1_SENDSLOPECREDIT
  MTL_TXQ1_SENDSLOPECREDIT (rw) register accessor: Queue 1 sendSlopeCredit
• PPS0_TARGET_TIME_NANOSECONDS
  PPS0_TARGET_TIME_NANOSECONDS (rw) register accessor: PPS0 Target Time Nanoseconds
• PPS0_TARGET_TIME_SECONDS
  PPS0_TARGET_TIME_SECONDS (rw) register accessor: PPS0 Target Time Seconds