Module mcxn947_pac::flexio0

FLEXIO

Modules

• ctrl
  FLEXIO Control Register
• param
  Parameter Register
• pin
  Pin State Register
• pinfen
  Pin Falling Edge Enable Register
• pinien
  Pin Interrupt Enable Register
• pinoutclr
  Pin Output Clear Register
• pinoutd
  Pin Output Data Register
• pinoutdis
  Pin Output Disable Register
• pinoute
  Pin Output Enable Register
• pinoutset
  Pin Output Set Register
• pinouttog
  Pin Output Toggle Register
• pinren
  Pin Rising Edge Enable Register
• pinstat
  Pin Status Register
• shiftbuf
  Shifter Buffer N Register
• shiftbufbbs
  Shifter Buffer N Bit Byte Swapped Register
• shiftbufbis
  Shifter Buffer N Bit Swapped Register
• shiftbufbys
  Shifter Buffer N Byte Swapped Register
• shiftbufeos
  Shifter Buffer N Even Odd Swapped Register
• shiftbufhbs
  Shifter Buffer N Halfword Byte Swapped Register
• shiftbufhws
  Shifter Buffer N Halfword Swapped Register
• shiftbufnbs
  Shifter Buffer N Nibble Byte Swapped Register
• shiftbufnis
  Shifter Buffer N Nibble Swapped Register
• shiftbufoes
  Shifter Buffer N Odd Even Swapped Register
• shiftcfg
  Shifter Configuration N Register
• shiftctl
  Shifter Control N Register
• shifteien
  Shifter Error Interrupt Enable
• shifterr
  Shifter Error Register
• shiftsden
  Shifter Status DMA Enable
• shiftsien
  Shifter Status Interrupt Enable
• shiftstat
  Shifter Status Register
• shiftstate
  Shifter State Register
• timcfg
  Timer Configuration N Register
• timcmp
  Timer Compare N Register
• timctl
  Timer Control N Register
• timersden
  Timer Status DMA Enable
• timien
  Timer Interrupt Enable Register
• timstat
  Timer Status Register
• trgstat
  Trigger Status Register
• trigien
  External Trigger Interrupt Enable Register
• verid
  Version ID Register

Structs

• RegisterBlock
  Register block

Type Aliases

• CTRL
  CTRL (rw) register accessor: FLEXIO Control Register
• PARAM
  PARAM (r) register accessor: Parameter Register
• PIN
  PIN (r) register accessor: Pin State Register
• PINFEN
  PINFEN (rw) register accessor: Pin Falling Edge Enable Register
• PINIEN
  PINIEN (rw) register accessor: Pin Interrupt Enable Register
• PINOUTCLR
  PINOUTCLR (rw) register accessor: Pin Output Clear Register
• PINOUTD
  PINOUTD (rw) register accessor: Pin Output Data Register
• PINOUTDIS
  PINOUTDIS (rw) register accessor: Pin Output Disable Register
• PINOUTE
  PINOUTE (rw) register accessor: Pin Output Enable Register
• PINOUTSET
  PINOUTSET (rw) register accessor: Pin Output Set Register
• PINOUTTOG
  PINOUTTOG (rw) register accessor: Pin Output Toggle Register
• PINREN
  PINREN (rw) register accessor: Pin Rising Edge Enable Register
• PINSTAT
  PINSTAT (rw) register accessor: Pin Status Register
• SHIFTBUF
  SHIFTBUF (rw) register accessor: Shifter Buffer N Register
• SHIFTBUFBBS
  SHIFTBUFBBS (rw) register accessor: Shifter Buffer N Bit Byte Swapped Register
• SHIFTBUFBIS
  SHIFTBUFBIS (rw) register accessor: Shifter Buffer N Bit Swapped Register
• SHIFTBUFBYS
  SHIFTBUFBYS (rw) register accessor: Shifter Buffer N Byte Swapped Register
• SHIFTBUFEOS
  SHIFTBUFEOS (rw) register accessor: Shifter Buffer N Even Odd Swapped Register
• SHIFTBUFHBS
  SHIFTBUFHBS (rw) register accessor: Shifter Buffer N Halfword Byte Swapped Register
• SHIFTBUFHWS
  SHIFTBUFHWS (rw) register accessor: Shifter Buffer N Halfword Swapped Register
• SHIFTBUFNBS
  SHIFTBUFNBS (rw) register accessor: Shifter Buffer N Nibble Byte Swapped Register
• SHIFTBUFNIS
  SHIFTBUFNIS (rw) register accessor: Shifter Buffer N Nibble Swapped Register
• SHIFTBUFOES
  SHIFTBUFOES (rw) register accessor: Shifter Buffer N Odd Even Swapped Register
• SHIFTCFG
  SHIFTCFG (rw) register accessor: Shifter Configuration N Register
• SHIFTCTL
  SHIFTCTL (rw) register accessor: Shifter Control N Register
• SHIFTEIEN
  SHIFTEIEN (rw) register accessor: Shifter Error Interrupt Enable
• SHIFTERR
  SHIFTERR (rw) register accessor: Shifter Error Register
• SHIFTSDEN
  SHIFTSDEN (rw) register accessor: Shifter Status DMA Enable
• SHIFTSIEN
  SHIFTSIEN (rw) register accessor: Shifter Status Interrupt Enable
• SHIFTSTAT
  SHIFTSTAT (rw) register accessor: Shifter Status Register
• SHIFTSTATE
  SHIFTSTATE (rw) register accessor: Shifter State Register
• TIMCFG
  TIMCFG (rw) register accessor: Timer Configuration N Register
• TIMCMP
  TIMCMP (rw) register accessor: Timer Compare N Register
• TIMCTL
  TIMCTL (rw) register accessor: Timer Control N Register
• TIMERSDEN
  TIMERSDEN (rw) register accessor: Timer Status DMA Enable
• TIMIEN
  TIMIEN (rw) register accessor: Timer Interrupt Enable Register
• TIMSTAT
  TIMSTAT (rw) register accessor: Timer Status Register
• TRGSTAT
  TRGSTAT (rw) register accessor: Trigger Status Register
• TRIGIEN
  TRIGIEN (rw) register accessor: External Trigger Interrupt Enable Register
• VERID
  VERID (r) register accessor: Version ID Register