Struct Padctrl0Spec 

pub struct Padctrl0Spec;

GPIO Input Mode Config 1. Each bit in this register enables the weak pull-up for the associated GPIO pin in this port.

You can read this register and get padctrl0::R. You can reset, write, write_with_zero this register using padctrl0::W. You can also modify this register. See API.

Trait Implementations

impl RegisterSpec for Padctrl0Spec

type Ux = u32

Raw register type (u8, u16, u32, …).

impl Resettable for Padctrl0Spec

reset() method sets PADCTRL0 to value 0

const RESET_VALUE: u32 = 0u32

Reset value of the register.

fn reset_value() -> Self::Ux

Reset value of the register.

impl Writable for Padctrl0Spec

write(|w| ..) method takes padctrl0::W writer structure

const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0u32

Specifies the register bits that are not changed if you pass 1 and are changed if you pass 0

const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0u32

Specifies the register bits that are not changed if you pass 0 and are changed if you pass 1

type Safety = Unsafe

Is it safe to write any bits to register

impl Readable for Padctrl0Spec

read() method returns padctrl0::R reader structure