Module lpc845_pac::usart0::ctl [−][src]
Expand description
USART Control register. USART control settings that are more likely to change during operation.
Structs
Field ADDRDET
reader - Enable address detect mode.
Field ADDRDET
writer - Enable address detect mode.
Field AUTOBAUD
reader - Autobaud enable.
Field AUTOBAUD
writer - Autobaud enable.
Field CC
reader - Continuous Clock generation. By default, SCLK is only output while data is being transmitted in synchronous mode.
Field CC
writer - Continuous Clock generation. By default, SCLK is only output while data is being transmitted in synchronous mode.
Field CLRCCONRX
reader - Clear Continuous Clock.
Field CLRCCONRX
writer - Clear Continuous Clock.
USART Control register. USART control settings that are more likely to change during operation.
Register CTL
reader
Field TXBRKEN
reader - Break Enable.
Field TXBRKEN
writer - Break Enable.
Field TXDIS
reader - Transmit Disable.
Field TXDIS
writer - Transmit Disable.
Register CTL
writer
Enums
Enable address detect mode.
Autobaud enable.
Continuous Clock generation. By default, SCLK is only output while data is being transmitted in synchronous mode.
Clear Continuous Clock.
Break Enable.
Transmit Disable.