Enum lpc845_pac::adc0::inten::SEQA_INTEN_A [−][src]
pub enum SEQA_INTEN_A {
DISABLED,
ENABLED,
}
Expand description
Sequence A interrupt enable.
Value on reset: 0
Variants
0: Disabled. The sequence A interrupt/DMA trigger is disabled.
1: Enabled. The sequence A interrupt/DMA trigger is enabled and will be asserted either upon completion of each individual conversion performed as part of sequence A, or upon completion of the entire A sequence of conversions, depending on the MODE bit in the SEQA_CTRL register.
Trait Implementations
Performs the conversion.