Module lpc845_pac::wwdt::mod_[][src]

Expand description

Watchdog mode register. This register contains the basic mode and status of the Watchdog Timer.

Structs

Field LOCK reader - Once this bit is set to one and a watchdog feed is performed, disabling or powering down the watchdog oscillator is prevented by hardware. This bit can be set once by software and is only cleared by any reset.

Field LOCK writer - Once this bit is set to one and a watchdog feed is performed, disabling or powering down the watchdog oscillator is prevented by hardware. This bit can be set once by software and is only cleared by any reset.

Watchdog mode register. This register contains the basic mode and status of the Watchdog Timer.

Register MOD reader

Register MOD writer

Field WDEN reader - Watchdog enable bit. Once this bit is set to one and a watchdog feed is performed, the watchdog timer will run permanently.

Field WDEN writer - Watchdog enable bit. Once this bit is set to one and a watchdog feed is performed, the watchdog timer will run permanently.

Field WDINT reader - Warning interrupt flag. Set when the timer is at or below the value in WDWARNINT. Cleared by software writing a 1 to this bit position. Note that this bit cannot be cleared while the WARNINT value is equal to the value of the TV register. This can occur if the value of WARNINT is 0 and the WDRESET bit is 0 when TV decrements to 0.

Field WDINT writer - Warning interrupt flag. Set when the timer is at or below the value in WDWARNINT. Cleared by software writing a 1 to this bit position. Note that this bit cannot be cleared while the WARNINT value is equal to the value of the TV register. This can occur if the value of WARNINT is 0 and the WDRESET bit is 0 when TV decrements to 0.

Field WDPROTECT reader - Watchdog update mode. This bit can be set once by software and is only cleared by a reset.

Field WDPROTECT writer - Watchdog update mode. This bit can be set once by software and is only cleared by a reset.

Field WDRESET reader - Watchdog reset enable bit. Once this bit has been written with a 1 it cannot be re-written with a 0.

Field WDRESET writer - Watchdog reset enable bit. Once this bit has been written with a 1 it cannot be re-written with a 0.

Field WDTOF reader - Watchdog time-out flag. Set when the watchdog timer times out, by a feed error, or by events associated with WDPROTECT. Cleared by software writing a 0 to this bit position. Causes a chip reset if WDRESET = 1.

Field WDTOF writer - Watchdog time-out flag. Set when the watchdog timer times out, by a feed error, or by events associated with WDPROTECT. Cleared by software writing a 0 to this bit position. Causes a chip reset if WDRESET = 1.

Enums

Watchdog enable bit. Once this bit is set to one and a watchdog feed is performed, the watchdog timer will run permanently.

Watchdog update mode. This bit can be set once by software and is only cleared by a reset.

Watchdog reset enable bit. Once this bit has been written with a 1 it cannot be re-written with a 0.