Module lpc845_pac::syscon::adcclkdiv

ADC clock divider register

Structs

ADCCLKDIV_SPEC

ADC clock divider register

DIV_R

Field DIV reader - ADC clock divider values 0: ADC clock disabled. 1: Divide by 1. to 255: Divide by 255.

DIV_W

Field DIV writer - ADC clock divider values 0: ADC clock disabled. 1: Divide by 1. to 255: Divide by 255.

R

Register ADCCLKDIV reader

W

Register ADCCLKDIV writer