Module lpc845_pac::ctimer0::pwmc[−][src]

Expand description

PWM Control Register. The PWMCON enables PWM mode for the external match pins.

Structs

PWMC_SPEC

PWM Control Register. The PWMCON enables PWM mode for the external match pins.

PWMEN0_R

Field PWMEN0 reader - PWM mode enable for channel0.

PWMEN0_W

Field PWMEN0 writer - PWM mode enable for channel0.

PWMEN1_R

Field PWMEN1 reader - PWM mode enable for channel1.

PWMEN1_W

Field PWMEN1 writer - PWM mode enable for channel1.

PWMEN2_R

Field PWMEN2 reader - PWM mode enable for channel2.

PWMEN2_W

Field PWMEN2 writer - PWM mode enable for channel2.

PWMEN3_R

Field PWMEN3 reader - PWM mode enable for channel3. Note: It is recommended to use match channel 3 to set the PWM cycle.

PWMEN3_W

Field PWMEN3 writer - PWM mode enable for channel3. Note: It is recommended to use match channel 3 to set the PWM cycle.

R

Register PWMC reader

W

Register PWMC writer

Enums

PWMEN0_A

PWM mode enable for channel0.

PWMEN1_A

PWM mode enable for channel1.

PWMEN2_A

PWM mode enable for channel2.

PWMEN3_A

PWM mode enable for channel3. Note: It is recommended to use match channel 3 to set the PWM cycle.