Module lpc82x::sct
[−]
[src]
State Configurable Timer (SCT)
Modules
| cap |
SCT capture register of capture channel 0 to 7; REGMOD0 to REGMODE7 = 1 |
| capctrl |
SCT capture control register 0 to 7; REGMOD0 = 1 to REGMODE7 = 1 |
| conen |
SCT conflict enable register |
| config |
SCT configuration register |
| conflag |
SCT conflict flag register |
| count |
SCT counter register |
| ctrl |
SCT control register |
| dmareq0 |
SCT DMA request 0 register |
| dmareq1 |
SCT DMA request 1 register |
| ev_ctrl |
SCT event control register 0 |
| ev_state |
SCT event state register 0 |
| even |
SCT event enable register |
| evflag |
SCT event flag register |
| halt |
SCT halt condition register |
| input |
SCT input register |
| limit |
SCT limit register |
| match_ |
SCT match value register of match channels 0 to 7; REGMOD0 to REGMODE7 = 0 |
| matchrel |
SCT match reload value register 0 to 7; REGMOD0 = 0 to REGMODE7 = 0 |
| out_clr |
SCT output 0 clear register |
| out_set |
SCT output 0 set register |
| output |
SCT output register |
| outputdirctrl |
SCT output counter direction control register |
| regmode |
SCT match/capture registers mode register |
| res |
SCT conflict resolution register |
| start |
SCT start condition register |
| state |
SCT state register |
| stop |
SCT stop condition register |
Structs
| CAP |
SCT capture register of capture channel 0 to 7; REGMOD0 to REGMODE7 = 1 |
| CAPCTRL |
SCT capture control register 0 to 7; REGMOD0 = 1 to REGMODE7 = 1 |
| CONEN |
SCT conflict enable register |
| CONFIG |
SCT configuration register |
| CONFLAG |
SCT conflict flag register |
| COUNT |
SCT counter register |
| CTRL |
SCT control register |
| DMAREQ0 |
SCT DMA request 0 register |
| DMAREQ1 |
SCT DMA request 1 register |
| EVEN |
SCT event enable register |
| EVFLAG |
SCT event flag register |
| EV_CTRL |
SCT event control register 0 |
| EV_STATE |
SCT event state register 0 |
| HALT |
SCT halt condition register |
| INPUT |
SCT input register |
| LIMIT |
SCT limit register |
| MATCH |
SCT match value register of match channels 0 to 7; REGMOD0 to REGMODE7 = 0 |
| MATCHREL |
SCT match reload value register 0 to 7; REGMOD0 = 0 to REGMODE7 = 0 |
| OUTPUT |
SCT output register |
| OUTPUTDIRCTRL |
SCT output counter direction control register |
| OUT_CLR |
SCT output 0 clear register |
| OUT_SET |
SCT output 0 set register |
| REGMODE |
SCT match/capture registers mode register |
| RES |
SCT conflict resolution register |
| RegisterBlock |
Register block |
| START |
SCT start condition register |
| STATE |
SCT state register |
| STOP |
SCT stop condition register |