Module lpc82x::syscon
[−]
[src]
System configuration (SYSCON)
Modules
bodctrl |
Brown-Out Detect |
clkoutdiv |
CLKOUT clock divider |
clkoutsel |
CLKOUT clock source select |
clkoutuen |
CLKOUT clock source update enable |
device_id |
Device ID |
exttracecmd |
External trace buffer command register |
ioconclkdiv6 |
Peripheral clock 6 to the IOCON block for programmable glitch filter |
ircctrl |
IRC control |
irqlatency |
IQR delay. Allows trade-off between interrupt latency and determinism. |
mainclksel |
Main clock source select |
mainclkuen |
Main clock source update enable |
nmisrc |
NMI Source Control |
pdawakecfg |
Power-down states for wake-up from deep-sleep |
pdruncfg |
Power configuration register |
pdsleepcfg |
Power-down states in deep-sleep mode |
pintsel |
GPIO Pin Interrupt Select register 0 |
pioporcap0 |
POR captured PIO status 0 |
presetctrl |
Peripheral reset control |
starterp0 |
Start logic 0 pin wake-up enable register |
starterp1 |
Start logic 1 interrupt wake-up enable register |
sysahbclkctrl |
System clock control |
sysahbclkdiv |
System clock divider |
sysmemremap |
System memory remap |
sysoscctrl |
System oscillator control |
syspllclksel |
System PLL clock source select |
syspllclkuen |
System PLL clock source update enable |
syspllctrl |
System PLL control |
syspllstat |
System PLL status |
sysrststat |
System reset status register |
systckcal |
System tick counter calibration |
uartclkdiv |
USART clock divider |
uartfrgdiv |
USART1 to USART4 common fractional generator divider value |
uartfrgmult |
USART1 to USART4 common fractional generator multiplier value |
wdtoscctrl |
Watchdog oscillator control |
Structs
BODCTRL |
Brown-Out Detect |
CLKOUTDIV |
CLKOUT clock divider |
CLKOUTSEL |
CLKOUT clock source select |
CLKOUTUEN |
CLKOUT clock source update enable |
DEVICE_ID |
Device ID |
EXTTRACECMD |
External trace buffer command register |
IOCONCLKDIV6 |
Peripheral clock 6 to the IOCON block for programmable glitch filter |
IRCCTRL |
IRC control |
IRQLATENCY |
IQR delay. Allows trade-off between interrupt latency and determinism. |
MAINCLKSEL |
Main clock source select |
MAINCLKUEN |
Main clock source update enable |
NMISRC |
NMI Source Control |
PDAWAKECFG |
Power-down states for wake-up from deep-sleep |
PDRUNCFG |
Power configuration register |
PDSLEEPCFG |
Power-down states in deep-sleep mode |
PINTSEL |
GPIO Pin Interrupt Select register 0 |
PIOPORCAP0 |
POR captured PIO status 0 |
PRESETCTRL |
Peripheral reset control |
RegisterBlock |
Register block |
STARTERP0 |
Start logic 0 pin wake-up enable register |
STARTERP1 |
Start logic 1 interrupt wake-up enable register |
SYSAHBCLKCTRL |
System clock control |
SYSAHBCLKDIV |
System clock divider |
SYSMEMREMAP |
System memory remap |
SYSOSCCTRL |
System oscillator control |
SYSPLLCLKSEL |
System PLL clock source select |
SYSPLLCLKUEN |
System PLL clock source update enable |
SYSPLLCTRL |
System PLL control |
SYSPLLSTAT |
System PLL status |
SYSRSTSTAT |
System reset status register |
SYSTCKCAL |
System tick counter calibration |
UARTCLKDIV |
USART clock divider |
UARTFRGDIV |
USART1 to USART4 common fractional generator divider value |
UARTFRGMULT |
USART1 to USART4 common fractional generator multiplier value |
WDTOSCCTRL |
Watchdog oscillator control |