Module lpc82x::adc
[−]
[src]
12-bit Analog-to-Digital Converter (ADC)
Modules
| chan_thrsel |
A/D Channel-Threshold Select Register. Specifies which set of threshold compare registers are to be used for each channel |
| ctrl |
A/D Control Register. Contains the clock divide value, enable bits for each sequence and the A/D power-down bit. |
| dat |
A/D Channel 0 Data Register. This register contains the result of the most recent conversion completed on channel 0. |
| flags |
A/D Flags Register. Contains the four interrupt request flags and the individual component overrun and threshold-compare flags. (The overrun bits replicate information stored in the result registers). |
| inten |
A/D Interrupt Enable Register. This register contains enable bits that enable the sequence-A, sequence-B, threshold compare and data overrun interrupts to be generated. |
| seqa_ctrl |
A/D Conversion Sequence-A control Register: Controls triggering and channel selection for conversion sequence-A. Also specifies interrupt mode for sequence-A. |
| seqa_gdat |
A/D Sequence-A Global Data Register. This register contains the result of the most recent A/D conversion performed under sequence-A |
| seqb_ctrl |
A/D Conversion Sequence-B Control Register: Controls triggering and channel selection for conversion sequence-B. Also specifies interrupt mode for sequence-B. |
| seqb_gdat |
A/D Sequence-B Global Data Register. This register contains the result of the most recent A/D conversion performed under sequence-B |
| thr0_high |
A/D High Compare Threshold Register 0: Contains the upper threshold level for automatic threshold comparison for any channels linked to threshold pair 0. |
| thr0_low |
A/D Low Compare Threshold Register 0 : Contains the lower threshold level for automatic threshold comparison for any channels linked to threshold pair 0. |
| thr1_high |
A/D High Compare Threshold Register 1: Contains the upper threshold level for automatic threshold comparison for any channels linked to threshold pair 1. |
| thr1_low |
A/D Low Compare Threshold Register 1: Contains the lower threshold level for automatic threshold comparison for any channels linked to threshold pair 1. |
| trm |
ADC trim register. |
Structs
| CHAN_THRSEL |
A/D Channel-Threshold Select Register. Specifies which set of threshold compare registers are to be used for each channel |
| CTRL |
A/D Control Register. Contains the clock divide value, enable bits for each sequence and the A/D power-down bit. |
| DAT |
A/D Channel 0 Data Register. This register contains the result of the most recent conversion completed on channel 0. |
| FLAGS |
A/D Flags Register. Contains the four interrupt request flags and the individual component overrun and threshold-compare flags. (The overrun bits replicate information stored in the result registers). |
| INTEN |
A/D Interrupt Enable Register. This register contains enable bits that enable the sequence-A, sequence-B, threshold compare and data overrun interrupts to be generated. |
| RegisterBlock |
Register block |
| SEQA_CTRL |
A/D Conversion Sequence-A control Register: Controls triggering and channel selection for conversion sequence-A. Also specifies interrupt mode for sequence-A. |
| SEQA_GDAT |
A/D Sequence-A Global Data Register. This register contains the result of the most recent A/D conversion performed under sequence-A |
| SEQB_CTRL |
A/D Conversion Sequence-B Control Register: Controls triggering and channel selection for conversion sequence-B. Also specifies interrupt mode for sequence-B. |
| SEQB_GDAT |
A/D Sequence-B Global Data Register. This register contains the result of the most recent A/D conversion performed under sequence-B |
| THR0_HIGH |
A/D High Compare Threshold Register 0: Contains the upper threshold level for automatic threshold comparison for any channels linked to threshold pair 0. |
| THR0_LOW |
A/D Low Compare Threshold Register 0 : Contains the lower threshold level for automatic threshold comparison for any channels linked to threshold pair 0. |
| THR1_HIGH |
A/D High Compare Threshold Register 1: Contains the upper threshold level for automatic threshold comparison for any channels linked to threshold pair 1. |
| THR1_LOW |
A/D Low Compare Threshold Register 1: Contains the lower threshold level for automatic threshold comparison for any channels linked to threshold pair 1. |
| TRM |
ADC trim register. |