[−][src]Module lpc82x_pac::i2c0::stat
Status register for Master, Slave, and Monitor functions.
Structs
| EVENTTIMEOUT_W | Write proxy for field |
| MONIDLE_W | Write proxy for field |
| MONOV_W | Write proxy for field |
| MSTARBLOSS_W | Write proxy for field |
| MSTSTSTPERR_W | Write proxy for field |
| SCLTIMEOUT_W | Write proxy for field |
| SLVDESEL_W | Write proxy for field |
Enums
| EVENTTIMEOUT_A | Event Time-out Interrupt flag. Indicates when the time between events has been longer than the time specified by the TIMEOUT register. Events include Start, Stop, and clock edges. The flag is cleared by writing a 1 to this bit. No time-out is created when the I2C-bus is idle. |
| MONACTIVE_A | Monitor Active flag. Indicates when the Monitor function considers the I 2C bus to be active. Active is defined here as when some Master is on the bus: a bus Start has occurred more recently than a bus Stop. |
| MONIDLE_A | Monitor Idle flag. This flag is set when the Monitor function sees the I2C bus change from active to inactive. This can be used by software to decide when to process data accumulated by the Monitor function. This flag will cause an interrupt when set if enabled via the INTENSET register. The flag can be cleared by writing a 1 to this bit. |
| MONOV_A | Monitor Overflow flag. |
| MONRDY_A | Monitor Ready. This flag is cleared when the MONRXDAT register is read. |
| MSTARBLOSS_A | Master Arbitration Loss flag. This flag can be cleared by software writing a 1 to this bit. It is also cleared automatically a 1 is written to MSTCONTINUE. |
| MSTPENDING_A | Master Pending. Indicates that the Master is waiting to continue communication on the I2C-bus (pending) or is idle. When the master is pending, the MSTSTATE bits indicate what type of software service if any the master expects. This flag will cause an interrupt when set if, enabled via the INTENSET register. The MSTPENDING flag is not set when the DMA is handling an event (if the MSTDMA bit in the MSTCTL register is set). If the master is in the idle state, and no communication is needed, mask this interrupt. |
| MSTSTATE_A | Master State code. The master state code reflects the master state when the MSTPENDING bit is set, that is the master is pending or in the idle state. Each value of this field indicates a specific required service for the Master function. All other values are reserved. See Table 400 for details of state values and appropriate responses. |
| MSTSTSTPERR_A | Master Start/Stop Error flag. This flag can be cleared by software writing a 1 to this bit. It is also cleared automatically a 1 is written to MSTCONTINUE. |
| SCLTIMEOUT_A | SCL Time-out Interrupt flag. Indicates when SCL has remained low longer than the time specific by the TIMEOUT register. The flag is cleared by writing a 1 to this bit. |
| SLVDESEL_A | Slave Deselected flag. This flag will cause an interrupt when set if enabled via INTENSET. This flag can be cleared by writing a 1 to this bit. |
| SLVIDX_A | Slave address match Index. This field is valid when the I2C slave function has been selected by receiving an address that matches one of the slave addresses defined by any enabled slave address registers, and provides an identification of the address that was matched. It is possible that more than one address could be matched, but only one match can be reported here. |
| SLVNOTSTR_A | Slave Not Stretching. Indicates when the slave function is stretching the I2C clock. This is needed in order to gracefully invoke Deep Sleep or Power-down modes during slave operation. This read-only flag reflects the slave function status in real time. |
| SLVPENDING_A | Slave Pending. Indicates that the Slave function is waiting to continue communication on the I2C-bus and needs software service. This flag will cause an interrupt when set if enabled via INTENSET. The SLVPENDING flag is not set when the DMA is handling an event (if the SLVDMA bit in the SLVCTL register is set). The SLVPENDING flag is read-only and is automatically cleared when a 1 is written to the SLVCONTINUE bit in the SLVCTL register. The point in time when SlvPending is set depends on whether the I2C interface is in HSCAPABLE mode. See Section 25.7.2.2.2. When the I2C interface is configured to be HSCAPABLE, HS master codes are detected automatically. Due to the requirements of the HS I2C specification, slave addresses must also be detected automatically, since the address must be acknowledged before the clock can be stretched. |
| SLVSEL_A | Slave selected flag. SLVSEL is set after an address match when software tells the Slave function to acknowledge the address, or when the address has been automatically acknowledged. It is cleared when another address cycle presents an address that does not match an enabled address on the Slave function, when slave software decides to NACK a matched address, when there is a Stop detected on the bus, when the master NACKs slave data, and in some combinations of Automatic Operation. SLVSEL is not cleared if software NACKs data. |
| SLVSTATE_A | Slave State code. Each value of this field indicates a specific required service for the Slave function. All other values are reserved. See Table 401 for state values and actions. note that the occurrence of some states and how they are handled are affected by DMA mode and Automatic Operation modes. |
Type Definitions
| EVENTTIMEOUT_R | Reader of field |
| MONACTIVE_R | Reader of field |
| MONIDLE_R | Reader of field |
| MONOV_R | Reader of field |
| MONRDY_R | Reader of field |
| MSTARBLOSS_R | Reader of field |
| MSTPENDING_R | Reader of field |
| MSTSTATE_R | Reader of field |
| MSTSTSTPERR_R | Reader of field |
| R | Reader of register STAT |
| SCLTIMEOUT_R | Reader of field |
| SLVDESEL_R | Reader of field |
| SLVIDX_R | Reader of field |
| SLVNOTSTR_R | Reader of field |
| SLVPENDING_R | Reader of field |
| SLVSEL_R | Reader of field |
| SLVSTATE_R | Reader of field |
| W | Writer for register STAT |