[−][src]Module lpc55s6x_pac::i2c0::mstctl
Master control register.
Structs
| MSTCONTINUE_W | Write proxy for field |
| MSTDMA_W | Write proxy for field |
| MSTSTART_W | Write proxy for field |
| MSTSTOP_W | Write proxy for field |
Enums
| MSTCONTINUE_AW | Master Continue. This bit is write-only. |
| MSTDMA_A | Master DMA enable. Data operations of the I2C can be performed with DMA. Protocol type operations such as Start, address, Stop, and address match must always be done with software, typically via an interrupt. Address acknowledgement must also be done by software except when the I2C is configured to be HSCAPABLE (and address acknowledgement is handled entirely by hardware) or when Automatic Operation is enabled. When a DMA data transfer is complete, MSTDMA must be cleared prior to beginning the next operation, typically a Start or Stop.This bit is read/write. |
| MSTSTART_A | Master Start control. This bit is write-only. |
| MSTSTOP_A | Master Stop control. This bit is write-only. |
Type Definitions
| MSTDMA_R | Reader of field |
| MSTSTART_R | Reader of field |
| MSTSTOP_R | Reader of field |
| R | Reader of register MSTCTL |
| W | Writer for register MSTCTL |