[][src]Module lpc55s6x_pac::flash

FLASH

Modules

cmd

command register

dataw

data register, word 0-7; Memory data, or command parameter, or command result.

event

event register

int_clr_enable

Clear interrupt enable bits

int_clr_status

Clear interrupt status bits

int_enable

Interrupt enable bits

int_set_enable

Set interrupt enable bits

int_set_status

Set interrupt status bits

int_status

Interrupt status bits

module_id

Controller+Memory module identification

starta

start (or only) address for next flash command

stopa

end address for next flash command, if command operates on address ranges

Structs

RegisterBlock

Register block

Type Definitions

CMD

command register

DATAW

data register, word 0-7; Memory data, or command parameter, or command result.

EVENT

event register

INT_CLR_ENABLE

Clear interrupt enable bits

INT_CLR_STATUS

Clear interrupt status bits

INT_ENABLE

Interrupt enable bits

INT_SET_ENABLE

Set interrupt enable bits

INT_SET_STATUS

Set interrupt status bits

INT_STATUS

Interrupt status bits

MODULE_ID

Controller+Memory module identification

STARTA

start (or only) address for next flash command

STOPA

end address for next flash command, if command operates on address ranges