[−][src]Module lpc55s6x_pac::ahb_secure_ctrl::cpu0_lock_reg

Miscalleneous control signals for in Cortex M33 (CPU0)

Structs

CPU0_LOCK_REG_LOCK_W	Write proxy for field `CPU0_LOCK_REG_LOCK`
LOCK_NS_MPU_W	Write proxy for field `LOCK_NS_MPU`
LOCK_NS_VTOR_W	Write proxy for field `LOCK_NS_VTOR`
LOCK_SAU_W	Write proxy for field `LOCK_SAU`
LOCK_S_MPU_W	Write proxy for field `LOCK_S_MPU`
LOCK_S_VTAIRCR_W	Write proxy for field `LOCK_S_VTAIRCR`

CPU0_LOCK_REG_LOCK_A	Possible values of the field `CPU0_LOCK_REG_LOCK`
LOCK_NS_MPU_A	Possible values of the field `LOCK_NS_MPU`
LOCK_NS_VTOR_A	Possible values of the field `LOCK_NS_VTOR`
LOCK_SAU_A	Possible values of the field `LOCK_SAU`
LOCK_S_MPU_A	Possible values of the field `LOCK_S_MPU`
LOCK_S_VTAIRCR_A	Possible values of the field `LOCK_S_VTAIRCR`

CPU0_LOCK_REG_LOCK_R	Reader of field `CPU0_LOCK_REG_LOCK`
LOCK_NS_MPU_R	Reader of field `LOCK_NS_MPU`
LOCK_NS_VTOR_R	Reader of field `LOCK_NS_VTOR`
LOCK_SAU_R	Reader of field `LOCK_SAU`
LOCK_S_MPU_R	Reader of field `LOCK_S_MPU`
LOCK_S_VTAIRCR_R	Reader of field `LOCK_S_VTAIRCR`
R	Reader of register CPU0_LOCK_REG
W	Writer for register CPU0_LOCK_REG