Crate lpc550x

Expand description

Peripheral access API for LPC550X/LPC55S0X microcontrollers (generated using svd2rust v0.26.0 ( ))

You can find an overview of the generated API here.

API features to be included in the next svd2rust release can be generated by cloning the svd2rust repository, checking out the above commit, and running cargo doc --open.

Re-exports

pub use self::flash_cfpa0 as flash_cfpa_scratch;

pub use self::flash_cfpa0 as flash_cfpa1;

pub use self::gint0 as gint1;

pub use self::pint as secpint;

pub use self::ctimer0 as ctimer1;

pub use self::ctimer0 as ctimer2;

pub use self::ctimer0 as ctimer3;

pub use self::ctimer0 as ctimer4;

pub use self::dma0 as dma1;

pub use self::flexcomm0 as flexcomm1;

pub use self::flexcomm0 as flexcomm2;

pub use self::flexcomm0 as flexcomm3;

pub use self::flexcomm0 as flexcomm4;

pub use self::flexcomm0 as flexcomm5;

pub use self::flexcomm0 as flexcomm6;

pub use self::flexcomm0 as flexcomm7;

pub use self::flexcomm0 as flexcomm8;

pub use self::i2c0 as i2c1;

pub use self::i2c0 as i2c2;

pub use self::i2c0 as i2c3;

pub use self::i2c0 as i2c4;

pub use self::i2c0 as i2c5;

pub use self::i2c0 as i2c6;

pub use self::i2c0 as i2c7;

pub use self::i2s0 as i2s1;

pub use self::i2s0 as i2s2;

pub use self::i2s0 as i2s3;

pub use self::i2s0 as i2s4;

pub use self::i2s0 as i2s5;

pub use self::i2s0 as i2s6;

pub use self::i2s0 as i2s7;

pub use self::spi0 as spi1;

pub use self::spi0 as spi3;

pub use self::spi0 as spi4;

pub use self::spi0 as spi6;

pub use self::spi0 as spi7;

pub use self::spi0 as spi8;

pub use self::usart0 as usart1;

pub use self::usart0 as usart2;

pub use self::usart0 as usart3;

pub use self::usart0 as usart4;

pub use self::usart0 as usart5;

pub use self::usart0 as usart6;

pub use self::usart0 as usart7;

Modules

adc0

ADC.

ahb_secure_ctrl

AHB secure controller.

anactrl

ANALOGCTRL.

can0

Controller Area Network Flexible Data (CAN FD)

cdog

CDOG.

crc_engine

CRC engine.

ctimer0

Standard counter/timers (CTIMER0 to 4)

dbgmailbox

MCU Debugger Mailbox.

DMA controller.

FLASH.

FLASH_CFPA.

FLASH_CMPA.

FLASH_KEY_STORE.

FLASH_NMPA.

FLASH_ROMPATCH.

Flexcomm serial communication.

generic

Common register and bit access and modify traits

gint0

Group GPIO input interrupt (GINT0/1)

gpio

General Purpose I/O (GPIO)

i2c0

I2C-bus interfaces.

i2s0

I2S interface.

inputmux

Input multiplexing (INPUT MUX)

iocon

I/O pin configuration (IOCON)

mrt0

Multi-Rate Timer (MRT)

ostimer

Synchronous OS/Event timer with Wakeup Timer.

pint

Pin interrupt and pattern match (PINT)

plu

LPC80X Programmable Logic Unit (PLU)

pmc

PMC.

rng

RNG.

rtc

Real-Time Clock (RTC)

sau

no description available.

scn_scb

no description available.

sct0

SCTimer/PWM (SCT)

secgpio

General Purpose I/O (GPIO)

spi0

Serial Peripheral Interfaces (SPI)

SYSCON.

system controller.

USARTs.

Micro-tick Timer (UTICK)

wwdt

Windowed Watchdog Timer (WWDT)

Structs

ADC0

ADC.

AHB_SECURE_CTRL

AHB secure controller.

ANACTRL

ANALOGCTRL.

CAN0

Controller Area Network Flexible Data (CAN FD)

CBP

Cache and branch predictor maintenance operations

CDOG.

CRC engine.

Standard counter/timers (CTIMER0 to 4)

CTIMER1

Standard counter/timers (CTIMER0 to 4)

CTIMER2

Standard counter/timers (CTIMER0 to 4)

CTIMER3

Standard counter/timers (CTIMER0 to 4)

CTIMER4

Standard counter/timers (CTIMER0 to 4)

CorePeripherals

Core peripherals

DBGMAILBOX

MCU Debugger Mailbox.

Debug Control Block

DMA controller.

DMA controller.

Data Watchpoint and Trace unit

FLASH.

FLASH_CFPA.

FLASH_CFPA.

FLASH_CFPA.

FLASH_CMPA.

FLASH_KEY_STORE.

FLASH_NMPA.

FLASH_ROMPATCH.

Flexcomm serial communication.

FLEXCOMM1

Flexcomm serial communication.

FLEXCOMM2

Flexcomm serial communication.

FLEXCOMM3

Flexcomm serial communication.

FLEXCOMM4

Flexcomm serial communication.

FLEXCOMM5

Flexcomm serial communication.

FLEXCOMM6

Flexcomm serial communication.

FLEXCOMM7

Flexcomm serial communication.

FLEXCOMM8

Flexcomm serial communication.

FPB

Flash Patch and Breakpoint unit

FPU

Floating Point Unit

GINT0

Group GPIO input interrupt (GINT0/1)

GINT1

Group GPIO input interrupt (GINT0/1)

GPIO

General Purpose I/O (GPIO)

I2C-bus interfaces.

I2C-bus interfaces.

I2C-bus interfaces.

I2C-bus interfaces.

I2C-bus interfaces.

I2C-bus interfaces.

I2C-bus interfaces.

I2C-bus interfaces.

I2S interface.

I2S interface.

I2S interface.

I2S interface.

I2S interface.

I2S interface.

I2S interface.

I2S interface.

Input multiplexing (INPUT MUX)

IOCON

I/O pin configuration (IOCON)

ITM

Instrumentation Trace Macrocell

MPU

Memory Protection Unit

MRT0

Multi-Rate Timer (MRT)

NVIC

Nested Vector Interrupt Controller

OSTIMER

Synchronous OS/Event timer with Wakeup Timer.

PINT

Pin interrupt and pattern match (PINT)

PLU

LPC80X Programmable Logic Unit (PLU)

PMC.

All the peripherals.

RNG.

Real-Time Clock (RTC)

SAU

no description available.

SCB

System Control Block

SCN_SCB

no description available.

SCT0

SCTimer/PWM (SCT)

SECGPIO

General Purpose I/O (GPIO)

SECPINT

Pin interrupt and pattern match (PINT)

SPI0

Serial Peripheral Interfaces (SPI)

SPI1

Serial Peripheral Interfaces (SPI)

SPI3

Serial Peripheral Interfaces (SPI)

SPI4

Serial Peripheral Interfaces (SPI)

SPI6

Serial Peripheral Interfaces (SPI)

SPI7

Serial Peripheral Interfaces (SPI)

SPI8

Serial Peripheral Interfaces (SPI)

SYSCON

SYSCON.

SYSCTL

system controller.

SYST

SysTick: System Timer

TPIU

Trace Port Interface Unit

USARTs.

USARTs.

USARTs.

USARTs.

USARTs.

USARTs.

USARTs.

USARTs.

Micro-tick Timer (UTICK)

WWDT

Windowed Watchdog Timer (WWDT)

Enums

Interrupt

Enumeration of all the interrupts.

Constants

NVIC_PRIO_BITS

Number available in the NVIC for configuring priority