Module lpc55_pac::usbphy::anactrl_clr

source · [−]
Expand description

USB PHY Analog Control Register

Structs

ANACTRL_CLR_SPEC

USB PHY Analog Control Register

DEV_PULLDOWN_R

Field DEV_PULLDOWN reader - Setting this field to 1’b1 will enable the 15kohm pulldown resistors on both USB_DP and USB_DM pins

DEV_PULLDOWN_W

Field DEV_PULLDOWN writer - Setting this field to 1’b1 will enable the 15kohm pulldown resistors on both USB_DP and USB_DM pins

LVI_EN_R

Field LVI_EN reader - Vow voltage detector enable bit.

LVI_EN_W

Field LVI_EN writer - Vow voltage detector enable bit.

PFD_CLK_SEL_R

Field PFD_CLK_SEL reader - For normal USB operation, this bit field must remain at value 2’b00.

PFD_CLK_SEL_W

Field PFD_CLK_SEL writer - For normal USB operation, this bit field must remain at value 2’b00.

R

Register ANACTRL_CLR reader

W

Register ANACTRL_CLR writer

Enums

DEV_PULLDOWN_A

Setting this field to 1’b1 will enable the 15kohm pulldown resistors on both USB_DP and USB_DM pins