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SPI Interrupt Enable Clear. Writing a 1 to any implemented bit position causes the corresponding bit in INTENSET to be cleared.

Structs

SPI Interrupt Enable Clear. Writing a 1 to any implemented bit position causes the corresponding bit in INTENSET to be cleared.

Field MSTIDLE writer - Writing 1 clears the corresponding bit in the INTENSET register.

Field SSAEN writer - Writing 1 clears the corresponding bit in the INTENSET register.

Field SSDEN writer - Writing 1 clears the corresponding bit in the INTENSET register.

Register INTENCLR writer