Expand description
SPI Interrupt Enable Clear. Writing a 1 to any implemented bit position causes the corresponding bit in INTENSET to be cleared.
Structs
SPI Interrupt Enable Clear. Writing a 1 to any implemented bit position causes the corresponding bit in INTENSET to be cleared.
Field MSTIDLE
writer - Writing 1 clears the corresponding bit in the INTENSET register.
Field SSAEN
writer - Writing 1 clears the corresponding bit in the INTENSET register.
Field SSDEN
writer - Writing 1 clears the corresponding bit in the INTENSET register.
Register INTENCLR
writer