Expand description
I2S interface
Modules
Configuration register 1 for the primary channel pair.
Configuration register 2 for the primary channel pair.
Clock divider, used by all channel pairs.
FIFO configuration and enable register.
FIFO interrupt enable clear (disable) and read register.
FIFO interrupt enable set (enable) and read register.
FIFO interrupt status register.
FIFO read data.
FIFO read data for upper data bits. May only be used if the I2S is configured for 2x 24-bit data and not using DMA.
FIFO data read for upper data bits with no FIFO pop. May only be used if the I2S is configured for 2x 24-bit data and not using DMA.
FIFO data read with no FIFO pop.
FIFO status register.
FIFO trigger settings for interrupt and DMA request.
FIFO write data.
FIFO write data for upper data bits. May only be used if the I2S is configured for 2x 24-bit data and not using DMA.
I2S Module identification
Status register for the primary channel pair.
Structs
Register block
Type Definitions
CFG1 register accessor: an alias for Reg<CFG1_SPEC>
CFG2 register accessor: an alias for Reg<CFG2_SPEC>
DIV register accessor: an alias for Reg<DIV_SPEC>
FIFOCFG register accessor: an alias for Reg<FIFOCFG_SPEC>
FIFOINTENCLR register accessor: an alias for Reg<FIFOINTENCLR_SPEC>
FIFOINTENSET register accessor: an alias for Reg<FIFOINTENSET_SPEC>
FIFOINTSTAT register accessor: an alias for Reg<FIFOINTSTAT_SPEC>
FIFORD register accessor: an alias for Reg<FIFORD_SPEC>
FIFORD48H register accessor: an alias for Reg<FIFORD48H_SPEC>
FIFORD48HNOPOP register accessor: an alias for Reg<FIFORD48HNOPOP_SPEC>
FIFORDNOPOP register accessor: an alias for Reg<FIFORDNOPOP_SPEC>
FIFOSTAT register accessor: an alias for Reg<FIFOSTAT_SPEC>
FIFOTRIG register accessor: an alias for Reg<FIFOTRIG_SPEC>
FIFOWR register accessor: an alias for Reg<FIFOWR_SPEC>
FIFOWR48H register accessor: an alias for Reg<FIFOWR48H_SPEC>
ID register accessor: an alias for Reg<ID_SPEC>
STAT register accessor: an alias for Reg<STAT_SPEC>