Module lpc55_pac::dma0::enableclr0

source · [−]
Expand description

Channel Enable Clear for all DMA channels.

Structs

CLR_W

Field CLR writer - Writing ones to this register clears the corresponding bits in ENABLESET0. Bit n clears the channel enable bit n. The number of bits = number of DMA channels in this device. Other bits are reserved.

ENABLECLR0_SPEC

Channel Enable Clear for all DMA channels.

W

Register ENABLECLR0 writer