Module lpc55_pac::spi0 [−][src]
Expand description
Serial Peripheral Interfaces (SPI)
Modules
SPI Configuration register
SPI clock Divider
SPI Delay register
FIFO configuration and enable register.
FIFO interrupt enable clear (disable) and read register.
FIFO interrupt enable set (enable) and read register.
FIFO interrupt status register.
FIFO read data.
FIFO data read with no FIFO pop.
FIFO status register.
FIFO trigger settings for interrupt and DMA request.
FIFO write data.
Peripheral identification register.
SPI Interrupt Enable Clear. Writing a 1 to any implemented bit position causes the corresponding bit in INTENSET to be cleared.
SPI Interrupt Enable read and Set. A complete value may be read from this register. Writing a 1 to any implemented bit position causes that bit to be set.
SPI Interrupt Status
SPI Status. Some status flags can be cleared by writing a 1 to that bit position.
Structs
Register block
Type Definitions
CFG register accessor: an alias for Reg<CFG_SPEC>
DIV register accessor: an alias for Reg<DIV_SPEC>
DLY register accessor: an alias for Reg<DLY_SPEC>
FIFOCFG register accessor: an alias for Reg<FIFOCFG_SPEC>
FIFOINTENCLR register accessor: an alias for Reg<FIFOINTENCLR_SPEC>
FIFOINTENSET register accessor: an alias for Reg<FIFOINTENSET_SPEC>
FIFOINTSTAT register accessor: an alias for Reg<FIFOINTSTAT_SPEC>
FIFORD register accessor: an alias for Reg<FIFORD_SPEC>
FIFORDNOPOP register accessor: an alias for Reg<FIFORDNOPOP_SPEC>
FIFOSTAT register accessor: an alias for Reg<FIFOSTAT_SPEC>
FIFOTRIG register accessor: an alias for Reg<FIFOTRIG_SPEC>
FIFOWR register accessor: an alias for Reg<FIFOWR_SPEC>
ID register accessor: an alias for Reg<ID_SPEC>
INTENCLR register accessor: an alias for Reg<INTENCLR_SPEC>
INTENSET register accessor: an alias for Reg<INTENSET_SPEC>
INTSTAT register accessor: an alias for Reg<INTSTAT_SPEC>
STAT register accessor: an alias for Reg<STAT_SPEC>