Module lpc55_pac::syscon::pll0stat

PLL0 550m status

Structs

FEEDDIVACK_R	Field FEEDDIVACK reader - feedback divider ratio change acknowledge.
FRMDET_R	Field FRMDET reader - free running detector output (active high).
LOCK_R	Field LOCK reader - lock detector output (active high) Warning: The lock signal is only reliable between fref[2] :100 kHz to 20 MHz.
PLL0STAT_SPEC	PLL0 550m status
POSTDIVACK_R	Field POSTDIVACK reader - post-divider ratio change acknowledge.
PREDIVACK_R	Field PREDIVACK reader - pre-divider ratio change acknowledge.
R	Register PLL0STAT reader
W	Register PLL0STAT writer