Module lpc55_pac::syscon::debug_features_dp [−][src]
Cortex M33 (CPU0) and micro Cortex M33 (CPU1) debug features control DUPLICATE register.
Structs
CPU0_DBGEN_R | Field |
CPU0_DBGEN_W | Field |
CPU0_NIDEN_R | Field |
CPU0_NIDEN_W | Field |
CPU0_SPIDEN_R | Field |
CPU0_SPIDEN_W | Field |
CPU0_SPNIDEN_R | Field |
CPU0_SPNIDEN_W | Field |
CPU1_DBGEN_R | Field |
CPU1_DBGEN_W | Field |
CPU1_NIDEN_R | Field |
CPU1_NIDEN_W | Field |
DEBUG_FEATURES_DP_SPEC | Cortex M33 (CPU0) and micro Cortex M33 (CPU1) debug features control DUPLICATE register. |
R | Register |
W | Register |
Enums
CPU0_DBGEN_A | CPU0 (CPU0) Invasive debug control:. |
CPU0_NIDEN_A | CPU0 Non Invasive debug control:. |
CPU0_SPIDEN_A | CPU0 Secure Invasive debug control:. |
CPU0_SPNIDEN_A | CPU0 Secure Non Invasive debug control:. |
CPU1_DBGEN_A | CPU1 Invasive debug control:. |
CPU1_NIDEN_A | CPU1 Non Invasive debug control:. |