Struct lpc55_pac::FLASH_CFPA_SCRATCH[−][src]

pub struct FLASH_CFPA_SCRATCH { /* fields omitted */ }

FLASH_CFPA

Implementations

`impl FLASH_CFPA_SCRATCH`[src]

`pub const PTR: *const RegisterBlock`[src]

Pointer to the register block

`pub const fn ptr() -> *const RegisterBlock`[src]

Return the pointer to the register block

Methods from Deref<Target = RegisterBlock>

`pub fn prince_region0_iv_header0(&self) -> &Reg<PRINCE_REGION0_IV_HEADER0_SPEC>`[src]

0x30 - .

`pub fn prince_region0_iv_code0(&self) -> &Reg<PRINCE_REGION0_IV_CODE0_SPEC>`[src]

0x30 - .

`pub fn prince_region0_iv_header1(&self) -> &Reg<PRINCE_REGION0_IV_HEADER1_SPEC>`[src]

0x34 - .

`pub fn prince_region0_iv_code1(&self) -> &Reg<PRINCE_REGION0_IV_CODE1_SPEC>`[src]

0x34 - .

`pub fn prince_region0_iv_code2(&self) -> &Reg<PRINCE_REGION0_IV_CODE2_SPEC>`[src]

0x38 - .

`pub fn prince_region0_iv_body0(&self) -> &Reg<PRINCE_REGION0_IV_BODY0_SPEC>`[src]

0x38 - .

`pub fn prince_region0_iv_code3(&self) -> &Reg<PRINCE_REGION0_IV_CODE3_SPEC>`[src]

0x3c - .

`pub fn prince_region0_iv_body1(&self) -> &Reg<PRINCE_REGION0_IV_BODY1_SPEC>`[src]

0x3c - .

`pub fn prince_region0_iv_code4(&self) -> &Reg<PRINCE_REGION0_IV_CODE4_SPEC>`[src]

0x40 - .

`pub fn prince_region0_iv_body2(&self) -> &Reg<PRINCE_REGION0_IV_BODY2_SPEC>`[src]

0x40 - .

`pub fn prince_region0_iv_code5(&self) -> &Reg<PRINCE_REGION0_IV_CODE5_SPEC>`[src]

0x44 - .

`pub fn prince_region0_iv_body3(&self) -> &Reg<PRINCE_REGION0_IV_BODY3_SPEC>`[src]

0x44 - .

`pub fn prince_region0_iv_code6(&self) -> &Reg<PRINCE_REGION0_IV_CODE6_SPEC>`[src]

0x48 - .

`pub fn prince_region0_iv_body4(&self) -> &Reg<PRINCE_REGION0_IV_BODY4_SPEC>`[src]

0x48 - .

`pub fn prince_region0_iv_code7(&self) -> &Reg<PRINCE_REGION0_IV_CODE7_SPEC>`[src]

0x4c - .

`pub fn prince_region0_iv_body5(&self) -> &Reg<PRINCE_REGION0_IV_BODY5_SPEC>`[src]

0x4c - .

`pub fn prince_region0_iv_code8(&self) -> &Reg<PRINCE_REGION0_IV_CODE8_SPEC>`[src]

0x50 - .

`pub fn prince_region0_iv_body6(&self) -> &Reg<PRINCE_REGION0_IV_BODY6_SPEC>`[src]

0x50 - .

`pub fn prince_region0_iv_code9(&self) -> &Reg<PRINCE_REGION0_IV_CODE9_SPEC>`[src]

0x54 - .

`pub fn prince_region0_iv_body7(&self) -> &Reg<PRINCE_REGION0_IV_BODY7_SPEC>`[src]

0x54 - .

`pub fn prince_region0_iv_code10(&self) -> &Reg<PRINCE_REGION0_IV_CODE10_SPEC>`[src]

0x58 - .

`pub fn prince_region0_iv_body8(&self) -> &Reg<PRINCE_REGION0_IV_BODY8_SPEC>`[src]

0x58 - .

`pub fn prince_region0_iv_code11(&self) -> &Reg<PRINCE_REGION0_IV_CODE11_SPEC>`[src]

0x5c - .

`pub fn prince_region0_iv_body9(&self) -> &Reg<PRINCE_REGION0_IV_BODY9_SPEC>`[src]

0x5c - .

`pub fn prince_region0_iv_code12(&self) -> &Reg<PRINCE_REGION0_IV_CODE12_SPEC>`[src]

0x60 - .

`pub fn prince_region0_iv_body10(&self) -> &Reg<PRINCE_REGION0_IV_BODY10_SPEC>`[src]

0x60 - .

`pub fn prince_region0_iv_code13(&self) -> &Reg<PRINCE_REGION0_IV_CODE13_SPEC>`[src]

0x64 - .

`pub fn prince_region0_iv_body11(&self) -> &Reg<PRINCE_REGION0_IV_BODY11_SPEC>`[src]

0x64 - .

`pub fn prince_region1_iv_header0(&self) -> &Reg<PRINCE_REGION1_IV_HEADER0_SPEC>`[src]

0x68 - .

`pub fn prince_region1_iv_code0(&self) -> &Reg<PRINCE_REGION1_IV_CODE0_SPEC>`[src]

0x68 - .

`pub fn prince_region1_iv_header1(&self) -> &Reg<PRINCE_REGION1_IV_HEADER1_SPEC>`[src]

0x6c - .

`pub fn prince_region1_iv_code1(&self) -> &Reg<PRINCE_REGION1_IV_CODE1_SPEC>`[src]

0x6c - .

`pub fn prince_region1_iv_code2(&self) -> &Reg<PRINCE_REGION1_IV_CODE2_SPEC>`[src]

0x70 - .

`pub fn prince_region1_iv_body0(&self) -> &Reg<PRINCE_REGION1_IV_BODY0_SPEC>`[src]

0x70 - .

`pub fn prince_region1_iv_code3(&self) -> &Reg<PRINCE_REGION1_IV_CODE3_SPEC>`[src]

0x74 - .

`pub fn prince_region1_iv_body1(&self) -> &Reg<PRINCE_REGION1_IV_BODY1_SPEC>`[src]

0x74 - .

`pub fn prince_region1_iv_code4(&self) -> &Reg<PRINCE_REGION1_IV_CODE4_SPEC>`[src]

0x78 - .

`pub fn prince_region1_iv_body2(&self) -> &Reg<PRINCE_REGION1_IV_BODY2_SPEC>`[src]

0x78 - .

`pub fn prince_region1_iv_code5(&self) -> &Reg<PRINCE_REGION1_IV_CODE5_SPEC>`[src]

0x7c - .

`pub fn prince_region1_iv_body3(&self) -> &Reg<PRINCE_REGION1_IV_BODY3_SPEC>`[src]

0x7c - .

`pub fn prince_region1_iv_code6(&self) -> &Reg<PRINCE_REGION1_IV_CODE6_SPEC>`[src]

0x80 - .

`pub fn prince_region1_iv_body4(&self) -> &Reg<PRINCE_REGION1_IV_BODY4_SPEC>`[src]

0x80 - .

`pub fn prince_region1_iv_code7(&self) -> &Reg<PRINCE_REGION1_IV_CODE7_SPEC>`[src]

0x84 - .

`pub fn prince_region1_iv_body5(&self) -> &Reg<PRINCE_REGION1_IV_BODY5_SPEC>`[src]

0x84 - .

`pub fn prince_region1_iv_code8(&self) -> &Reg<PRINCE_REGION1_IV_CODE8_SPEC>`[src]

0x88 - .

`pub fn prince_region1_iv_body6(&self) -> &Reg<PRINCE_REGION1_IV_BODY6_SPEC>`[src]

0x88 - .

`pub fn prince_region1_iv_code9(&self) -> &Reg<PRINCE_REGION1_IV_CODE9_SPEC>`[src]

0x8c - .

`pub fn prince_region1_iv_body7(&self) -> &Reg<PRINCE_REGION1_IV_BODY7_SPEC>`[src]

0x8c - .

`pub fn prince_region1_iv_code10(&self) -> &Reg<PRINCE_REGION1_IV_CODE10_SPEC>`[src]

0x90 - .

`pub fn prince_region1_iv_body8(&self) -> &Reg<PRINCE_REGION1_IV_BODY8_SPEC>`[src]

0x90 - .

`pub fn prince_region1_iv_code11(&self) -> &Reg<PRINCE_REGION1_IV_CODE11_SPEC>`[src]

0x94 - .

`pub fn prince_region1_iv_body9(&self) -> &Reg<PRINCE_REGION1_IV_BODY9_SPEC>`[src]

0x94 - .

`pub fn prince_region1_iv_code12(&self) -> &Reg<PRINCE_REGION1_IV_CODE12_SPEC>`[src]

0x98 - .

`pub fn prince_region1_iv_body10(&self) -> &Reg<PRINCE_REGION1_IV_BODY10_SPEC>`[src]

0x98 - .

`pub fn prince_region1_iv_code13(&self) -> &Reg<PRINCE_REGION1_IV_CODE13_SPEC>`[src]

0x9c - .

`pub fn prince_region1_iv_body11(&self) -> &Reg<PRINCE_REGION1_IV_BODY11_SPEC>`[src]

0x9c - .

`pub fn prince_region2_iv_header0(&self) -> &Reg<PRINCE_REGION2_IV_HEADER0_SPEC>`[src]

0xa0 - .

`pub fn prince_region2_iv_code0(&self) -> &Reg<PRINCE_REGION2_IV_CODE0_SPEC>`[src]

0xa0 - .

`pub fn prince_region2_iv_header1(&self) -> &Reg<PRINCE_REGION2_IV_HEADER1_SPEC>`[src]

0xa4 - .

`pub fn prince_region2_iv_code1(&self) -> &Reg<PRINCE_REGION2_IV_CODE1_SPEC>`[src]

0xa4 - .

`pub fn prince_region2_iv_code2(&self) -> &Reg<PRINCE_REGION2_IV_CODE2_SPEC>`[src]

0xa8 - .

`pub fn prince_region2_iv_body0(&self) -> &Reg<PRINCE_REGION2_IV_BODY0_SPEC>`[src]

0xa8 - .

`pub fn prince_region2_iv_code3(&self) -> &Reg<PRINCE_REGION2_IV_CODE3_SPEC>`[src]

0xac - .

`pub fn prince_region2_iv_body1(&self) -> &Reg<PRINCE_REGION2_IV_BODY1_SPEC>`[src]

0xac - .

`pub fn prince_region2_iv_code4(&self) -> &Reg<PRINCE_REGION2_IV_CODE4_SPEC>`[src]

0xb0 - .

`pub fn prince_region2_iv_body2(&self) -> &Reg<PRINCE_REGION2_IV_BODY2_SPEC>`[src]

0xb0 - .

`pub fn prince_region2_iv_code5(&self) -> &Reg<PRINCE_REGION2_IV_CODE5_SPEC>`[src]

0xb4 - .

`pub fn prince_region2_iv_body3(&self) -> &Reg<PRINCE_REGION2_IV_BODY3_SPEC>`[src]

0xb4 - .

`pub fn prince_region2_iv_code6(&self) -> &Reg<PRINCE_REGION2_IV_CODE6_SPEC>`[src]

0xb8 - .

`pub fn prince_region2_iv_body4(&self) -> &Reg<PRINCE_REGION2_IV_BODY4_SPEC>`[src]

0xb8 - .

`pub fn prince_region2_iv_code7(&self) -> &Reg<PRINCE_REGION2_IV_CODE7_SPEC>`[src]

0xbc - .

`pub fn prince_region2_iv_body5(&self) -> &Reg<PRINCE_REGION2_IV_BODY5_SPEC>`[src]

0xbc - .

`pub fn prince_region2_iv_code8(&self) -> &Reg<PRINCE_REGION2_IV_CODE8_SPEC>`[src]

0xc0 - .

`pub fn prince_region2_iv_body6(&self) -> &Reg<PRINCE_REGION2_IV_BODY6_SPEC>`[src]

0xc0 - .

`pub fn prince_region2_iv_code9(&self) -> &Reg<PRINCE_REGION2_IV_CODE9_SPEC>`[src]

0xc4 - .

`pub fn prince_region2_iv_body7(&self) -> &Reg<PRINCE_REGION2_IV_BODY7_SPEC>`[src]

0xc4 - .

`pub fn prince_region2_iv_code10(&self) -> &Reg<PRINCE_REGION2_IV_CODE10_SPEC>`[src]

0xc8 - .

`pub fn prince_region2_iv_body8(&self) -> &Reg<PRINCE_REGION2_IV_BODY8_SPEC>`[src]

0xc8 - .

`pub fn prince_region2_iv_code11(&self) -> &Reg<PRINCE_REGION2_IV_CODE11_SPEC>`[src]

0xcc - .

`pub fn prince_region2_iv_body9(&self) -> &Reg<PRINCE_REGION2_IV_BODY9_SPEC>`[src]

0xcc - .

`pub fn prince_region2_iv_code12(&self) -> &Reg<PRINCE_REGION2_IV_CODE12_SPEC>`[src]

0xd0 - .

`pub fn prince_region2_iv_body10(&self) -> &Reg<PRINCE_REGION2_IV_BODY10_SPEC>`[src]

0xd0 - .

`pub fn prince_region2_iv_code13(&self) -> &Reg<PRINCE_REGION2_IV_CODE13_SPEC>`[src]

0xd4 - .

`pub fn prince_region2_iv_body11(&self) -> &Reg<PRINCE_REGION2_IV_BODY11_SPEC>`[src]

0xd4 - .

Trait Implementations

`impl Debug for FLASH_CFPA_SCRATCH`[src]

`fn fmt(&self, f: &mut Formatter<'_>) -> Result`[src]

`impl Deref for FLASH_CFPA_SCRATCH`[src]

`type Target = RegisterBlock`

The resulting type after dereferencing.

`fn deref(&self) -> &Self::Target`[src]

`impl Send for FLASH_CFPA_SCRATCH`[src]

Auto Trait Implementations

`impl !Sync for FLASH_CFPA_SCRATCH`

`impl Unpin for FLASH_CFPA_SCRATCH`

Blanket Implementations

`impl<T> Any for T where T: 'static + ?Sized,` [src]

`pub fn type_id(&self) -> TypeId`[src]

`impl<T> Borrow<T> for T where T: ?Sized,` [src]

`pub fn borrow(&self) -> &T`[src]

`impl<T> BorrowMut<T> for T where T: ?Sized,` [src]

`pub fn borrow_mut(&mut self) -> &mut T`[src]

`impl<T> From<T> for T`[src]

`pub fn from(t: T) -> T`[src]

`impl<T, U> Into for T where U: From<T>,` [src]

`pub fn into(self) -> U`[src]

`impl<T, U> TryFrom for T where U: Into<T>,` [src]

`type Error = Infallible`

The type returned in the event of a conversion error.

`pub fn try_from(value: U) -> Result<T, <T as TryFrom>::Error>`[src]

`impl<T, U> TryInto for T where U: TryFrom<T>,` [src]

`type Error = >::Error`

The type returned in the event of a conversion error.

Struct lpc55_pac::FLASH_CFPA_SCRATCH⎘[−][src]

Implementations

impl FLASH_CFPA_SCRATCH[src]

pub const PTR: *const RegisterBlock[src]

pub const fn ptr() -> *const RegisterBlock[src]

Methods from Deref<Target = RegisterBlock>

pub fn prince_region0_iv_header0(&self) -> &Reg<PRINCE_REGION0_IV_HEADER0_SPEC>[src]

pub fn prince_region0_iv_code0(&self) -> &Reg<PRINCE_REGION0_IV_CODE0_SPEC>[src]

pub fn prince_region0_iv_header1(&self) -> &Reg<PRINCE_REGION0_IV_HEADER1_SPEC>[src]

pub fn prince_region0_iv_code1(&self) -> &Reg<PRINCE_REGION0_IV_CODE1_SPEC>[src]

pub fn prince_region0_iv_code2(&self) -> &Reg<PRINCE_REGION0_IV_CODE2_SPEC>[src]

pub fn prince_region0_iv_body0(&self) -> &Reg<PRINCE_REGION0_IV_BODY0_SPEC>[src]

pub fn prince_region0_iv_code3(&self) -> &Reg<PRINCE_REGION0_IV_CODE3_SPEC>[src]

pub fn prince_region0_iv_body1(&self) -> &Reg<PRINCE_REGION0_IV_BODY1_SPEC>[src]

pub fn prince_region0_iv_code4(&self) -> &Reg<PRINCE_REGION0_IV_CODE4_SPEC>[src]

pub fn prince_region0_iv_body2(&self) -> &Reg<PRINCE_REGION0_IV_BODY2_SPEC>[src]

pub fn prince_region0_iv_code5(&self) -> &Reg<PRINCE_REGION0_IV_CODE5_SPEC>[src]

pub fn prince_region0_iv_body3(&self) -> &Reg<PRINCE_REGION0_IV_BODY3_SPEC>[src]

pub fn prince_region0_iv_code6(&self) -> &Reg<PRINCE_REGION0_IV_CODE6_SPEC>[src]

pub fn prince_region0_iv_body4(&self) -> &Reg<PRINCE_REGION0_IV_BODY4_SPEC>[src]

pub fn prince_region0_iv_code7(&self) -> &Reg<PRINCE_REGION0_IV_CODE7_SPEC>[src]

pub fn prince_region0_iv_body5(&self) -> &Reg<PRINCE_REGION0_IV_BODY5_SPEC>[src]

pub fn prince_region0_iv_code8(&self) -> &Reg<PRINCE_REGION0_IV_CODE8_SPEC>[src]

pub fn prince_region0_iv_body6(&self) -> &Reg<PRINCE_REGION0_IV_BODY6_SPEC>[src]

pub fn prince_region0_iv_code9(&self) -> &Reg<PRINCE_REGION0_IV_CODE9_SPEC>[src]

pub fn prince_region0_iv_body7(&self) -> &Reg<PRINCE_REGION0_IV_BODY7_SPEC>[src]

pub fn prince_region0_iv_code10(&self) -> &Reg<PRINCE_REGION0_IV_CODE10_SPEC>[src]

pub fn prince_region0_iv_body8(&self) -> &Reg<PRINCE_REGION0_IV_BODY8_SPEC>[src]

pub fn prince_region0_iv_code11(&self) -> &Reg<PRINCE_REGION0_IV_CODE11_SPEC>[src]

pub fn prince_region0_iv_body9(&self) -> &Reg<PRINCE_REGION0_IV_BODY9_SPEC>[src]

pub fn prince_region0_iv_code12(&self) -> &Reg<PRINCE_REGION0_IV_CODE12_SPEC>[src]

pub fn prince_region0_iv_body10(&self) -> &Reg<PRINCE_REGION0_IV_BODY10_SPEC>[src]

pub fn prince_region0_iv_code13(&self) -> &Reg<PRINCE_REGION0_IV_CODE13_SPEC>[src]

pub fn prince_region0_iv_body11(&self) -> &Reg<PRINCE_REGION0_IV_BODY11_SPEC>[src]

pub fn prince_region1_iv_header0(&self) -> &Reg<PRINCE_REGION1_IV_HEADER0_SPEC>[src]

pub fn prince_region1_iv_code0(&self) -> &Reg<PRINCE_REGION1_IV_CODE0_SPEC>[src]

pub fn prince_region1_iv_header1(&self) -> &Reg<PRINCE_REGION1_IV_HEADER1_SPEC>[src]

pub fn prince_region1_iv_code1(&self) -> &Reg<PRINCE_REGION1_IV_CODE1_SPEC>[src]

pub fn prince_region1_iv_code2(&self) -> &Reg<PRINCE_REGION1_IV_CODE2_SPEC>[src]

pub fn prince_region1_iv_body0(&self) -> &Reg<PRINCE_REGION1_IV_BODY0_SPEC>[src]

pub fn prince_region1_iv_code3(&self) -> &Reg<PRINCE_REGION1_IV_CODE3_SPEC>[src]

pub fn prince_region1_iv_body1(&self) -> &Reg<PRINCE_REGION1_IV_BODY1_SPEC>[src]

pub fn prince_region1_iv_code4(&self) -> &Reg<PRINCE_REGION1_IV_CODE4_SPEC>[src]

pub fn prince_region1_iv_body2(&self) -> &Reg<PRINCE_REGION1_IV_BODY2_SPEC>[src]

pub fn prince_region1_iv_code5(&self) -> &Reg<PRINCE_REGION1_IV_CODE5_SPEC>[src]

pub fn prince_region1_iv_body3(&self) -> &Reg<PRINCE_REGION1_IV_BODY3_SPEC>[src]

pub fn prince_region1_iv_code6(&self) -> &Reg<PRINCE_REGION1_IV_CODE6_SPEC>[src]

pub fn prince_region1_iv_body4(&self) -> &Reg<PRINCE_REGION1_IV_BODY4_SPEC>[src]

pub fn prince_region1_iv_code7(&self) -> &Reg<PRINCE_REGION1_IV_CODE7_SPEC>[src]

pub fn prince_region1_iv_body5(&self) -> &Reg<PRINCE_REGION1_IV_BODY5_SPEC>[src]

pub fn prince_region1_iv_code8(&self) -> &Reg<PRINCE_REGION1_IV_CODE8_SPEC>[src]

pub fn prince_region1_iv_body6(&self) -> &Reg<PRINCE_REGION1_IV_BODY6_SPEC>[src]

pub fn prince_region1_iv_code9(&self) -> &Reg<PRINCE_REGION1_IV_CODE9_SPEC>[src]

pub fn prince_region1_iv_body7(&self) -> &Reg<PRINCE_REGION1_IV_BODY7_SPEC>[src]

pub fn prince_region1_iv_code10(&self) -> &Reg<PRINCE_REGION1_IV_CODE10_SPEC>[src]

pub fn prince_region1_iv_body8(&self) -> &Reg<PRINCE_REGION1_IV_BODY8_SPEC>[src]

pub fn prince_region1_iv_code11(&self) -> &Reg<PRINCE_REGION1_IV_CODE11_SPEC>[src]

pub fn prince_region1_iv_body9(&self) -> &Reg<PRINCE_REGION1_IV_BODY9_SPEC>[src]

pub fn prince_region1_iv_code12(&self) -> &Reg<PRINCE_REGION1_IV_CODE12_SPEC>[src]

pub fn prince_region1_iv_body10(&self) -> &Reg<PRINCE_REGION1_IV_BODY10_SPEC>[src]

pub fn prince_region1_iv_code13(&self) -> &Reg<PRINCE_REGION1_IV_CODE13_SPEC>[src]

pub fn prince_region1_iv_body11(&self) -> &Reg<PRINCE_REGION1_IV_BODY11_SPEC>[src]

pub fn prince_region2_iv_header0(&self) -> &Reg<PRINCE_REGION2_IV_HEADER0_SPEC>[src]

pub fn prince_region2_iv_code0(&self) -> &Reg<PRINCE_REGION2_IV_CODE0_SPEC>[src]

pub fn prince_region2_iv_header1(&self) -> &Reg<PRINCE_REGION2_IV_HEADER1_SPEC>[src]

pub fn prince_region2_iv_code1(&self) -> &Reg<PRINCE_REGION2_IV_CODE1_SPEC>[src]

pub fn prince_region2_iv_code2(&self) -> &Reg<PRINCE_REGION2_IV_CODE2_SPEC>[src]

pub fn prince_region2_iv_body0(&self) -> &Reg<PRINCE_REGION2_IV_BODY0_SPEC>[src]

pub fn prince_region2_iv_code3(&self) -> &Reg<PRINCE_REGION2_IV_CODE3_SPEC>[src]

pub fn prince_region2_iv_body1(&self) -> &Reg<PRINCE_REGION2_IV_BODY1_SPEC>[src]

pub fn prince_region2_iv_code4(&self) -> &Reg<PRINCE_REGION2_IV_CODE4_SPEC>[src]

pub fn prince_region2_iv_body2(&self) -> &Reg<PRINCE_REGION2_IV_BODY2_SPEC>[src]

pub fn prince_region2_iv_code5(&self) -> &Reg<PRINCE_REGION2_IV_CODE5_SPEC>[src]

pub fn prince_region2_iv_body3(&self) -> &Reg<PRINCE_REGION2_IV_BODY3_SPEC>[src]

pub fn prince_region2_iv_code6(&self) -> &Reg<PRINCE_REGION2_IV_CODE6_SPEC>[src]

pub fn prince_region2_iv_body4(&self) -> &Reg<PRINCE_REGION2_IV_BODY4_SPEC>[src]

pub fn prince_region2_iv_code7(&self) -> &Reg<PRINCE_REGION2_IV_CODE7_SPEC>[src]

pub fn prince_region2_iv_body5(&self) -> &Reg<PRINCE_REGION2_IV_BODY5_SPEC>[src]

pub fn prince_region2_iv_code8(&self) -> &Reg<PRINCE_REGION2_IV_CODE8_SPEC>[src]

pub fn prince_region2_iv_body6(&self) -> &Reg<PRINCE_REGION2_IV_BODY6_SPEC>[src]