Module lpc55_pac::flash_cfpa0::dcfg_cc_socu_pin [−][src]
With TZ-M, the part can be sold by level 1 customers (secure code developer) to level-2 customers who develops non-secure code only. - In this scenario, or easy of development, Level-I customer releases the part to always allow non-secure debug. - To allow level-2 customers to further seal the part DCFG_CC_SOCU_NS is used. - ROM will use this word to further restrict the debug access.
Structs
| CPU1_DBGEN_W | Write proxy for field |
| CPU1_NIDEN_W | Write proxy for field |
| DBGEN_W | Write proxy for field |
| FA_CMD_EN_W | Write proxy for field |
| INVERSE_VALUE_W | Write proxy for field |
| ISP_CMD_EN_W | Write proxy for field |
| ME_CMD_EN_W | Write proxy for field |
| NIDEN_W | Write proxy for field |
| SPIDEN_W | Write proxy for field |
| SPNIDEN_W | Write proxy for field |
| TAPEN_W | Write proxy for field |
| UUID_CHECK_W | Write proxy for field |
Enums
| CPU1_DBGEN_A | CPU1 (Micro cortex M33) invasive debug enable |
| CPU1_NIDEN_A | CPU1 (Micro cortex M33) non-invasive debug enable |
| DBGEN_A | Non Secure debug enable |
| FA_CMD_EN_A | FA Command enable |
| ISP_CMD_EN_A | ISP Boot Command enable |
| ME_CMD_EN_A | Flash Mass Erase Command enable |
| NIDEN_A | Non Secure non-invasive debug enable |
| SPIDEN_A | Secure invasive debug enable |
| SPNIDEN_A | Secure non-invasive debug enable |
| TAPEN_A | JTAG TAP enable |
Type Definitions
| CPU1_DBGEN_R | Reader of field |
| CPU1_NIDEN_R | Reader of field |
| DBGEN_R | Reader of field |
| FA_CMD_EN_R | Reader of field |
| INVERSE_VALUE_R | Reader of field |
| ISP_CMD_EN_R | Reader of field |
| ME_CMD_EN_R | Reader of field |
| NIDEN_R | Reader of field |
| R | Reader of register DCFG_CC_SOCU_PIN |
| SPIDEN_R | Reader of field |
| SPNIDEN_R | Reader of field |
| TAPEN_R | Reader of field |
| UUID_CHECK_R | Reader of field |
| W | Writer for register DCFG_CC_SOCU_PIN |