1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179
#[doc = "DMA Channelx Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_chx_ctrl](dma_chx_ctrl) module"] pub type DMA_CHX_CTRL = crate::Reg<u32, _DMA_CHX_CTRL>; #[allow(missing_docs)] #[doc(hidden)] pub struct _DMA_CHX_CTRL; #[doc = "`read()` method returns [dma_chx_ctrl::R](dma_chx_ctrl::R) reader structure"] impl crate::Readable for DMA_CHX_CTRL {} #[doc = "`write(|w| ..)` method takes [dma_chx_ctrl::W](dma_chx_ctrl::W) writer structure"] impl crate::Writable for DMA_CHX_CTRL {} #[doc = "DMA Channelx Control"] pub mod dma_chx_ctrl; #[doc = "DMA Channelx Transmit Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_chx_tx_ctrl](dma_chx_tx_ctrl) module"] pub type DMA_CHX_TX_CTRL = crate::Reg<u32, _DMA_CHX_TX_CTRL>; #[allow(missing_docs)] #[doc(hidden)] pub struct _DMA_CHX_TX_CTRL; #[doc = "`read()` method returns [dma_chx_tx_ctrl::R](dma_chx_tx_ctrl::R) reader structure"] impl crate::Readable for DMA_CHX_TX_CTRL {} #[doc = "`write(|w| ..)` method takes [dma_chx_tx_ctrl::W](dma_chx_tx_ctrl::W) writer structure"] impl crate::Writable for DMA_CHX_TX_CTRL {} #[doc = "DMA Channelx Transmit Control"] pub mod dma_chx_tx_ctrl; #[doc = "DMA Channelx Receive Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_chx_rx_ctrl](dma_chx_rx_ctrl) module"] pub type DMA_CHX_RX_CTRL = crate::Reg<u32, _DMA_CHX_RX_CTRL>; #[allow(missing_docs)] #[doc(hidden)] pub struct _DMA_CHX_RX_CTRL; #[doc = "`read()` method returns [dma_chx_rx_ctrl::R](dma_chx_rx_ctrl::R) reader structure"] impl crate::Readable for DMA_CHX_RX_CTRL {} #[doc = "`write(|w| ..)` method takes [dma_chx_rx_ctrl::W](dma_chx_rx_ctrl::W) writer structure"] impl crate::Writable for DMA_CHX_RX_CTRL {} #[doc = "DMA Channelx Receive Control"] pub mod dma_chx_rx_ctrl; #[doc = "no description available\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_chx_txdesc_list_addr](dma_chx_txdesc_list_addr) module"] pub type DMA_CHX_TXDESC_LIST_ADDR = crate::Reg<u32, _DMA_CHX_TXDESC_LIST_ADDR>; #[allow(missing_docs)] #[doc(hidden)] pub struct _DMA_CHX_TXDESC_LIST_ADDR; #[doc = "`read()` method returns [dma_chx_txdesc_list_addr::R](dma_chx_txdesc_list_addr::R) reader structure"] impl crate::Readable for DMA_CHX_TXDESC_LIST_ADDR {} #[doc = "`write(|w| ..)` method takes [dma_chx_txdesc_list_addr::W](dma_chx_txdesc_list_addr::W) writer structure"] impl crate::Writable for DMA_CHX_TXDESC_LIST_ADDR {} #[doc = "no description available"] pub mod dma_chx_txdesc_list_addr; #[doc = "no description available\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_chx_rxdesc_list_addr](dma_chx_rxdesc_list_addr) module"] pub type DMA_CHX_RXDESC_LIST_ADDR = crate::Reg<u32, _DMA_CHX_RXDESC_LIST_ADDR>; #[allow(missing_docs)] #[doc(hidden)] pub struct _DMA_CHX_RXDESC_LIST_ADDR; #[doc = "`read()` method returns [dma_chx_rxdesc_list_addr::R](dma_chx_rxdesc_list_addr::R) reader structure"] impl crate::Readable for DMA_CHX_RXDESC_LIST_ADDR {} #[doc = "`write(|w| ..)` method takes [dma_chx_rxdesc_list_addr::W](dma_chx_rxdesc_list_addr::W) writer structure"] impl crate::Writable for DMA_CHX_RXDESC_LIST_ADDR {} #[doc = "no description available"] pub mod dma_chx_rxdesc_list_addr; #[doc = "no description available\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_chx_txdesc_tail_ptr](dma_chx_txdesc_tail_ptr) module"] pub type DMA_CHX_TXDESC_TAIL_PTR = crate::Reg<u32, _DMA_CHX_TXDESC_TAIL_PTR>; #[allow(missing_docs)] #[doc(hidden)] pub struct _DMA_CHX_TXDESC_TAIL_PTR; #[doc = "`read()` method returns [dma_chx_txdesc_tail_ptr::R](dma_chx_txdesc_tail_ptr::R) reader structure"] impl crate::Readable for DMA_CHX_TXDESC_TAIL_PTR {} #[doc = "`write(|w| ..)` method takes [dma_chx_txdesc_tail_ptr::W](dma_chx_txdesc_tail_ptr::W) writer structure"] impl crate::Writable for DMA_CHX_TXDESC_TAIL_PTR {} #[doc = "no description available"] pub mod dma_chx_txdesc_tail_ptr; #[doc = "no description available\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_chx_rxdesc_tail_ptr](dma_chx_rxdesc_tail_ptr) module"] pub type DMA_CHX_RXDESC_TAIL_PTR = crate::Reg<u32, _DMA_CHX_RXDESC_TAIL_PTR>; #[allow(missing_docs)] #[doc(hidden)] pub struct _DMA_CHX_RXDESC_TAIL_PTR; #[doc = "`read()` method returns [dma_chx_rxdesc_tail_ptr::R](dma_chx_rxdesc_tail_ptr::R) reader structure"] impl crate::Readable for DMA_CHX_RXDESC_TAIL_PTR {} #[doc = "`write(|w| ..)` method takes [dma_chx_rxdesc_tail_ptr::W](dma_chx_rxdesc_tail_ptr::W) writer structure"] impl crate::Writable for DMA_CHX_RXDESC_TAIL_PTR {} #[doc = "no description available"] pub mod dma_chx_rxdesc_tail_ptr; #[doc = "no description available\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_chx_txdesc_ring_length](dma_chx_txdesc_ring_length) module"] pub type DMA_CHX_TXDESC_RING_LENGTH = crate::Reg<u32, _DMA_CHX_TXDESC_RING_LENGTH>; #[allow(missing_docs)] #[doc(hidden)] pub struct _DMA_CHX_TXDESC_RING_LENGTH; #[doc = "`read()` method returns [dma_chx_txdesc_ring_length::R](dma_chx_txdesc_ring_length::R) reader structure"] impl crate::Readable for DMA_CHX_TXDESC_RING_LENGTH {} #[doc = "`write(|w| ..)` method takes [dma_chx_txdesc_ring_length::W](dma_chx_txdesc_ring_length::W) writer structure"] impl crate::Writable for DMA_CHX_TXDESC_RING_LENGTH {} #[doc = "no description available"] pub mod dma_chx_txdesc_ring_length; #[doc = "Channelx Rx descriptor Ring Length\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_chx_rxdesc_ring_length](dma_chx_rxdesc_ring_length) module"] pub type DMA_CHX_RXDESC_RING_LENGTH = crate::Reg<u32, _DMA_CHX_RXDESC_RING_LENGTH>; #[allow(missing_docs)] #[doc(hidden)] pub struct _DMA_CHX_RXDESC_RING_LENGTH; #[doc = "`read()` method returns [dma_chx_rxdesc_ring_length::R](dma_chx_rxdesc_ring_length::R) reader structure"] impl crate::Readable for DMA_CHX_RXDESC_RING_LENGTH {} #[doc = "`write(|w| ..)` method takes [dma_chx_rxdesc_ring_length::W](dma_chx_rxdesc_ring_length::W) writer structure"] impl crate::Writable for DMA_CHX_RXDESC_RING_LENGTH {} #[doc = "Channelx Rx descriptor Ring Length"] pub mod dma_chx_rxdesc_ring_length; #[doc = "Channelx Interrupt Enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_chx_int_en](dma_chx_int_en) module"] pub type DMA_CHX_INT_EN = crate::Reg<u32, _DMA_CHX_INT_EN>; #[allow(missing_docs)] #[doc(hidden)] pub struct _DMA_CHX_INT_EN; #[doc = "`read()` method returns [dma_chx_int_en::R](dma_chx_int_en::R) reader structure"] impl crate::Readable for DMA_CHX_INT_EN {} #[doc = "`write(|w| ..)` method takes [dma_chx_int_en::W](dma_chx_int_en::W) writer structure"] impl crate::Writable for DMA_CHX_INT_EN {} #[doc = "Channelx Interrupt Enable"] pub mod dma_chx_int_en; #[doc = "Receive Interrupt Watchdog Timer\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_chx_rx_int_wdtimer](dma_chx_rx_int_wdtimer) module"] pub type DMA_CHX_RX_INT_WDTIMER = crate::Reg<u32, _DMA_CHX_RX_INT_WDTIMER>; #[allow(missing_docs)] #[doc(hidden)] pub struct _DMA_CHX_RX_INT_WDTIMER; #[doc = "`read()` method returns [dma_chx_rx_int_wdtimer::R](dma_chx_rx_int_wdtimer::R) reader structure"] impl crate::Readable for DMA_CHX_RX_INT_WDTIMER {} #[doc = "`write(|w| ..)` method takes [dma_chx_rx_int_wdtimer::W](dma_chx_rx_int_wdtimer::W) writer structure"] impl crate::Writable for DMA_CHX_RX_INT_WDTIMER {} #[doc = "Receive Interrupt Watchdog Timer"] pub mod dma_chx_rx_int_wdtimer; #[doc = "Slot Function Control and Status\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_chx_slot_func_ctrl_stat](dma_chx_slot_func_ctrl_stat) module"] pub type DMA_CHX_SLOT_FUNC_CTRL_STAT = crate::Reg<u32, _DMA_CHX_SLOT_FUNC_CTRL_STAT>; #[allow(missing_docs)] #[doc(hidden)] pub struct _DMA_CHX_SLOT_FUNC_CTRL_STAT; #[doc = "`read()` method returns [dma_chx_slot_func_ctrl_stat::R](dma_chx_slot_func_ctrl_stat::R) reader structure"] impl crate::Readable for DMA_CHX_SLOT_FUNC_CTRL_STAT {} #[doc = "`write(|w| ..)` method takes [dma_chx_slot_func_ctrl_stat::W](dma_chx_slot_func_ctrl_stat::W) writer structure"] impl crate::Writable for DMA_CHX_SLOT_FUNC_CTRL_STAT {} #[doc = "Slot Function Control and Status"] pub mod dma_chx_slot_func_ctrl_stat; #[doc = "Channelx Current Host Transmit descriptor\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_chx_cur_hst_txdesc](dma_chx_cur_hst_txdesc) module"] pub type DMA_CHX_CUR_HST_TXDESC = crate::Reg<u32, _DMA_CHX_CUR_HST_TXDESC>; #[allow(missing_docs)] #[doc(hidden)] pub struct _DMA_CHX_CUR_HST_TXDESC; #[doc = "`read()` method returns [dma_chx_cur_hst_txdesc::R](dma_chx_cur_hst_txdesc::R) reader structure"] impl crate::Readable for DMA_CHX_CUR_HST_TXDESC {} #[doc = "Channelx Current Host Transmit descriptor"] pub mod dma_chx_cur_hst_txdesc; #[doc = "no description available\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_chx_cur_hst_rxdesc](dma_chx_cur_hst_rxdesc) module"] pub type DMA_CHX_CUR_HST_RXDESC = crate::Reg<u32, _DMA_CHX_CUR_HST_RXDESC>; #[allow(missing_docs)] #[doc(hidden)] pub struct _DMA_CHX_CUR_HST_RXDESC; #[doc = "`read()` method returns [dma_chx_cur_hst_rxdesc::R](dma_chx_cur_hst_rxdesc::R) reader structure"] impl crate::Readable for DMA_CHX_CUR_HST_RXDESC {} #[doc = "no description available"] pub mod dma_chx_cur_hst_rxdesc; #[doc = "no description available\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_chx_cur_hst_txbuf](dma_chx_cur_hst_txbuf) module"] pub type DMA_CHX_CUR_HST_TXBUF = crate::Reg<u32, _DMA_CHX_CUR_HST_TXBUF>; #[allow(missing_docs)] #[doc(hidden)] pub struct _DMA_CHX_CUR_HST_TXBUF; #[doc = "`read()` method returns [dma_chx_cur_hst_txbuf::R](dma_chx_cur_hst_txbuf::R) reader structure"] impl crate::Readable for DMA_CHX_CUR_HST_TXBUF {} #[doc = "no description available"] pub mod dma_chx_cur_hst_txbuf; #[doc = "Channelx Current Application Receive Buffer Address\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_chx_cur_hst_rxbuf](dma_chx_cur_hst_rxbuf) module"] pub type DMA_CHX_CUR_HST_RXBUF = crate::Reg<u32, _DMA_CHX_CUR_HST_RXBUF>; #[allow(missing_docs)] #[doc(hidden)] pub struct _DMA_CHX_CUR_HST_RXBUF; #[doc = "`read()` method returns [dma_chx_cur_hst_rxbuf::R](dma_chx_cur_hst_rxbuf::R) reader structure"] impl crate::Readable for DMA_CHX_CUR_HST_RXBUF {} #[doc = "Channelx Current Application Receive Buffer Address"] pub mod dma_chx_cur_hst_rxbuf; #[doc = "Channelx DMA status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_chx_stat](dma_chx_stat) module"] pub type DMA_CHX_STAT = crate::Reg<u32, _DMA_CHX_STAT>; #[allow(missing_docs)] #[doc(hidden)] pub struct _DMA_CHX_STAT; #[doc = "`read()` method returns [dma_chx_stat::R](dma_chx_stat::R) reader structure"] impl crate::Readable for DMA_CHX_STAT {} #[doc = "`write(|w| ..)` method takes [dma_chx_stat::W](dma_chx_stat::W) writer structure"] impl crate::Writable for DMA_CHX_STAT {} #[doc = "Channelx DMA status register"] pub mod dma_chx_stat;